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LMR23630AFDDA Datasheet(PDF) 14 Page - Texas Instruments

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Part # LMR23630AFDDA
Description  SIMPLE SWITCHER 36-V, 3-A Synchronous Step-Down Converter
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMR23630AFDDA Datasheet(HTML) 14 Page - Texas Instruments

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RENT
Clock
Source
EN/SYNC
CSYNC
VIN
RENB
RENT
EN/SYNC
VIN
RENB
14
LMR23630
SNVSAH2C – DECEMBER 2015 – REVISED JUNE 2017
www.ti.com
Product Folder Links: LMR23630
Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
8.3.4 Enable/Sync
The voltage on the EN pin controls the ON or OFF operation of LMR23630. A voltage less than 1 V (typical)
shuts down the device while a voltage higher than 1.6 V (typical) is required to start the regulator. The EN pin is
an input and cannot be left open or floating. The simplest way to enable the operation of the LMR23630 is to
connect the EN to VIN. This allows self-start-up of the LMR23630 when VIN is within the operation range.
Many applications can benefit from the employment of an enable divider RENT and RENB (Figure 16) to establish a
precision system UVLO level for the converter. System UVLO can be used for supplies operating from utility
power as well as battery power. It can be used for sequencing, ensuring reliable operation, or supply protection,
such as a battery discharge level. An external logic signal can also be used to drive EN input for system
sequencing and protection.
Figure 16. System UVLO by Enable Divider
The EN pin also can be used to synchronize the internal oscillator to an external clock. The internal oscillator can
be synchronized by AC-coupling a positive edge into the EN pin. The AC-coupled peak-to-peak voltage at the EN
pin must exceed the SYNC amplitude threshold of 2.8 V (typical) to trip the internal synchronization pulse
detector, and the minimum SYNC clock ON-time and OFF-time must be longer than 100 ns (typical). A 3.3-V or a
higher amplitude pulse signal coupled through a 1-nF capacitor CSYNC is a good starting point. Keeping RENT //
RENB (RENT parallel with RENB) in the 100 kΩ range is a good choice. RENT is required for this synchronization
circuit, but RENB can be left unmounted if system UVLO is not needed. LMR23630 switching action can be
synchronized to an external clock from 200 kHz to 2.2 MHz. Figure 18 and Figure 19 show the device
synchronized to an external system clock.
Figure 17. Synchronize to External Clock


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