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ICS93716 Datasheet(PDF) 1 Page - Integrated Circuit Systems

Part No. ICS93716
Description  Low Cost DDR Phase Lock Loop Clock Driver
Download  12 Pages
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Maker  ICST [Integrated Circuit Systems]
Homepage  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS93716 Datasheet(HTML) 1 Page - Integrated Circuit Systems

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Integrated
Circuit
Systems, Inc.
ICS93716
0420E—04/01/03
Block Diagram
Low Cost DDR Phase Lock Loop Clock Driver
Pin Configuration
28-Pin SSOP and TSSOP
Recommended Application:
DDR Clock Driver
Product Description/Features:
Low skew, low jitter PLL clock driver
•I
2C for functional and output control
Feedback pins for input to output synchronization
Spread Spectrum tolerant inputs
Switching Characteristics:
PEAK - PEAK jitter (66MHz): <120ps
PEAK - PEAK jitter (>100MHz): <75ps
CYCLE - CYCLE jitter (>100MHz):<65ps
OUTPUT - OUTPUT skew: <100ps
Output Rise and Fall Time: 650ps - 950ps
Functionality
S
T
U
P
N
IS
T
U
P
T
U
O
e
t
a
t
S
L
L
P
D
D
V
AT
N
I
_
K
L
CC
N
I
_
K
L
CT
K
L
CC
K
L
CT
T
U
O
_
B
FC
T
U
O
_
B
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V
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.
2
)
m
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2
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)
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M
0
2
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Z
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f
f
o
D
N
GL
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f
f
o
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s
a
p
y
B
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GH
L
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f
f
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s
s
a
p
y
B
FB_INT
FB_INC
CLK_INC
CLK_INT
SCLK
SDATA
Control
Logic
FB_OUTT
FB_OUTC
CLKT0
CLKT1
CLKT2
CLKT3
CLKT4
CLKT5
CLKC0
CLKC1
CLKC2
CLKC3
CLKC4
CLKC5
PLL
CLKC0
CLKT0
VDD
CLKT1
CLKC1
GND
SCLK
CLK_INT
CLK_INC
VDDA
GND
VDD
CLKT2
CLKC2
GND
CLKC5
CLKT5
CLKC4
CLKT4
VDD
SDATA
FBINC
FBINT
FB_OUTT
FB_OUTC
CLKT3
CLKC3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15


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