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DS_K6F2016U4E Datasheet(PDF) 2 Page - Samsung semiconductor |
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DS_K6F2016U4E Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 9 page CMOS SRAM K6F2016U4E Family - 2 - Revision 2.0 September 2001 PRODUCT FAMILY 1. The parameter is measured with 30pF test load. 2. Typical values are measured at VCC=3.0V, TA=25 °C and not 100% tested. Product Family Operating Temperature Vcc Range Speed Power Dissipation PKG Type Standby (ISB1, Typ.) Operating (ICC1, Max) K6F2016U4E-F Industrial(-40~85 °C) 2.7~3.3V 551)/70ns 0.5 µA2) 2mA 48-TBGA-6.00x7.00 128K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM GENERAL DESCRIPTION The K6F2016U4E families are fabricated by SAMSUNG ′s advanced full CMOS process technology. The families support industrial temperature range and 48 ball Chip Scale Package for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current. FEATURES • Process Technology: Full CMOS • Organization: 128K x16 bit • Power Supply Voltage: 2.7~3.3V • Low Data Retention Voltage: 1.5V(Min) • Three State Outputs • Package Type: 48-TBGA-6.00x7.00 FUNCTIONAL BLOCK DIAGRAM SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice . Precharge circuit. Memory array 1024 rows 128 × 16 columns I/O Circuit Column select Clk gen. Row select WE OE UB CS I/O1~I/O8 Data cont Data cont Data cont LB I/O9~I/O16 Vcc Vss Row Addresses Control Logic Column Addresses PIN DESCRIPTION Name Function Name Function CS1, CS2 Chip Select Inputs Vcc Power OE Output Enable Input Vss Ground WE Write Enable Input UB Upper Byte(I/O9~16) A0~A16 Address Inputs LB Lower Byte(I/O1~8) I/O1~I/O16 Data Inputs/Outputs DNU Do Not Use 48-TBGA: Top View (Ball Down) LB OE A0 A1 A2 DNU I/O9 UB A3 A4 CS1 I/O1 I/O10 I/O11 A5 A6 I/O2 I/O3 Vss I/O12 DNU A7 I/O4 Vcc Vcc I/O13 A16 I/O5 Vss I/O15 I/O14 A14 A15 I/O6 I/O7 I/O16 DNU A12 A13 WE I/O8 DNU A8 A9 A10 A11 DNU 1 2 3 4 5 6 A B C D E F G H DNU |
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