DS1846

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MEMORY ORGANIZATION

The EEPROM of the DS1846 contains 256 bytes. Bytes 00h to F7h are general-purpose user memory.

The next three bytes, F8h, F9h, and FAh, contain the wiper settings for each of the potentiometers (see

Table 1). The last five bytes, FBh to FFh, are reserved and should not be used.

The memory, internal to the device, is organized as 32 pages of eight bytes each. Once an address byte is

clocked into the device through the 2-wire interface, the five MSBs decode which page is to be accessed,

and the three LSBs decode a particular byte on that page. The selected page is shadowed in SRAM as a

staging area while data is clocked in or out through the 2-wire interface. When reading any number of

bytes, all eight bytes of the current page are shadowed in SRAM where the requested byte(s) eventually

get clocked out. When reading, the page is incremented automatically, and hence transparent to the user.

When performing a write, the page of the starting address is shadowed in SRAM. The new data is then

written to the SRAM. When the end of the page is reached, the address returns to the beginning of the

same page. When the 2-wire master issues a stop, the entire page (even if only a single byte changed) is

copied from the SRAM into EEPROM. All reads and writes to the EEPROM are actually executed as

page operations even though they are invisible to the user when performing single byte reads and writes.

Understanding the internal memory organization is important when performing sequential address writes

due to page boundaries. See the Write Operations in the 2-WIRE OPERATION section for more

information.

MEMORY LOCATIONS Table 1

MEMORY

LOCATION

NAME OF MEMORY

LOCATION

FUNCTION OF MEMORY LOCATION

00h to F7h

User Memory

General-purpose user memory.

F8h

Potentiometer 1 Setting

Writing to this byte controls the setting of potentiometer 1, a

256-position pot. Valid settings are 00h to FFh.

F9h

Potentiometer 0 Setting

Writing to this byte controls the setting of potentiometer 0, a

100-position pot. Valid settings are 00h to 63h. MSB is ignored.

FAh

Potentiometer 2 Setting

Writing to this byte controls the setting of potentiometer 0, a

100-position pot. Valid settings are 00h to 63h. MSB is ignored.

FBh to FFh

Reserved

Reserved