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5L35021-dddNDGI Datasheet(PDF) 2 Page - Integrated Device Technology |
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5L35021-dddNDGI Datasheet(HTML) 2 Page - Integrated Device Technology |
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2 / 37 page  2 ©2017 Integrated Device Technology, Inc. July 13, 2017 5L35021 Datasheet Pin Assignments Figure 1. Pin Assignments for 3 x 3 mm 20-VFQFPN Package – Top View Pin Descriptions Table 1. Pin Descriptions Number Name Type Description 1VDDA Power VDD 1.8V 2SDA_DFC0 I/O I2C data pin. The pin can be DFC0 function by pin 3 SEL_DFC power-on latch status. 3 SEL_DFC/ SCL_DFC1 Input I2C CLK pin. SEL_DFC is a latch input pin during the power-up. High on power-on: I2C mode as SCLK function. Low on power-on: pin 3 SCL and pin 2 SDA as DFC function control pins. 4 CLKIN/X2 I/O Crystal oscillator interface output or differential clock input pin (CLKIN). 5 CLKINB/X1 Input Crystal oscillator interface input or differential clock input pin (CLKINB). 6VBAT Power Power supply pin for 32.768kHz DCO; usually connect to coin cell battery, 1.8V. 7VSS Power Connect to ground. 8VDD18 Power VDD 1.8V. 9VSSSE1 Power Connect to ground. 10 VDDSE1 Power Output power supply. Connect to 1.8V. Sets output voltage levels for SE1. 11 SE1 Output Output clock SE1. 12 OE1 Input OE1’s function selected from OTP pre-programmed register bits. OE1 pull to 6.5V when burn OTP registers. Refer to OE Pin Functions table for details. 13 VDDDIFF1 Power Output power supply. Connect to 1.8V. Sets output voltage levels for DIFF1. 3 x 3 mm 20-QFN 5L35021 CLKINB/X1 CLKIN/X2 SEL_DFC/SCL_DFC1 SDA_DFCO VDDA 2 3 4 5 SE1 OE1 VDDDIFF1 DIFF1B DIFF1 67 8 9 10 20 19 18 17 16 1 15 14 13 12 11 |
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