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N79E352APG Datasheet(PDF) 11 Page - List of Unclassifed Manufacturers |
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N79E352APG Datasheet(HTML) 11 Page - List of Unclassifed Manufacturers |
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11 / 135 page  Preliminary N79E352/N79E352R Data Sheet Publication Release Date: Jul, 29, 2009 - 11 - Revision A06 6. FUNCTIONAL DESCRIPTION N79E352(R) architecture consist of a 4T 8051 core controller surrounded by various registers, 8K bytes Flash EPROM, 256 bytes of RAM, 128 bytes NVM Data Flash EPROM; three timer/counters, one UART serial port, one I2C serial port, eight keyboard interrupt input, 2-channel PWM with 8-bit counter and Flash EPROM program by Writer. 6.1 On-Chip Flash EPROM N79E352(R) includes one 8K bytes of main Flash EPROM for application program which need Writer to program the Flash EPROM. 6.2 I/O Ports N79E352(R) has four 8-bit, one 4-bit port and one 2-bit port, with at least 36 I/O pins. All ports (except port 4) can be used as four outputs mode when it may set by PxM1.y and PxM2.y registers, it has strong pull-ups and pull-downs, and does not need any external pull-ups. Otherwise it can be used as general I/O port as open drain circuit. All ports can be used bi-directional and these are as I/O ports. These ports are not true I/O, but rather are pseudo-I/O ports. This is because these ports have strong pull-downs and weak pull-ups. 6.3 Serial I/O N79E352(R) has one UART serial port that is functionally similar to the serial port of the original 8052 family. However the serial port on N79E352(R) can operate in different modes in order to obtain timing similarity as well. The Serial port has the enhanced features of Automatic Address recognition and Frame Error detection. 6.4 Timers The device has total three 16-bit timers; two 16-bit timers that have functions similar to the timers of the 8052 family, and third timer is capable to function as timer and also provide capture support. When used as timers, user has a choice to set 12 or 4 clocks per count that emulates the timing of the original 8052. Each timer’s count value is stored in two SFR locations that can be written or read by software. There are also some other SFRs associated with the timers that control their mode and operation. 6.5 Interrupts The Interrupt structure in N79E352(R) is slightly different from that of the standard 8052. Due to the presence of additional features and peripherals, the number of interrupt sources and vectors has been increased. 6.6 Data Pointers The original 8052 had only one 16-bit Data Pointer (DPL, DPH). In the N79E352(R), there is an additional 16-bit Data Pointer (DPL1, DPH1). This new Data Pointer uses two SFR locations which were unused in the original 8052. In addition there is an added instruction, DEC DPTR (op-code A5H), which helps in improving programming flexibility for the user. 6.7 Architecture N79E352(R) is based on the standard 8052 device. It is built around an 8-bit ALU that uses internal registers for temporary storage and control of the peripheral devices. It can execute the standard 8052 instruction set. |
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