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C3640H393KUGWCTU Datasheet(PDF) 7 Page - Kemet Corporation |
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C3640H393KUGWCTU Datasheet(HTML) 7 Page - Kemet Corporation |
7 / 17 page © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com C1035_C0G_PULSE_SMD • 8/2/2016 7 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Pulse Discharge, High Voltage, High Temperature 200°C C0G Dielectric, 1,000 VDC – 3,500 VDC (Industrial Grade) Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351 Size Code (In.) Metric Size Code Density Level A: Maximum (Most) Land Protrusion (mm) Density Level B: Median (Nominal) Land Protrusion (mm) Density Level C: Minimum (Least) Land Protrusion (mm) C Y X V1 V2 C Y X V1 V2 C Y X V1 V2 2824 7260 3.45 1.70 6.60 9.60 7.60 3.35 1.50 6.50 8.70 7.00 3.25 1.30 6.40 8.00 6.70 3040 7610 3.70 1.70 10.70 10.10 11.70 3.60 1.50 10.60 9.20 11.10 3.50 1.30 10.50 8.50 10.80 3640 9210 4.45 1.70 10.70 11.60 11.70 4.35 1.50 10.60 10.70 11.10 4.25 1.30 10.50 10.00 10.80 4540 - 5.60 1.70 10.70 13.90 11.70 5.50 1.50 10.60 13.00 11.10 5.40 1.30 10.50 12.30 10.80 Density Level A: For low-density product applications. Provides a wider process window for reflow solder processes. Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes. Density Level C: For high component density product applications. Before adapting the minimum land pattern variations, the user should perform qualification testing based on the conditions outlined in IPC Standard 7351 (IPC–7351). Image below based on Density Level B for a 3640 case size. C C X X V1 V2 Y Y |
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