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74LS194A Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. 74LS194A
Description  4-Bit Bidirectional Universal Shift Register
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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74LS194A Datasheet(HTML) 3 Page - National Semiconductor (TI)

   
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Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
From (Input)
54LS
DM74LS
Symbol
Parameter
To (Output)
CL e 15 pF
CL e 50 pF
Units
RL e 2kX
Min
Max
Min
Max
fMAX
Maximum Clock
30
20
MHz
Frequency
tPLH
Propagation Delay Time
Clock to
21
26
ns
Low to High Level Output
Any Q
tPHL
Propagation Delay Time
Clock to
24
35
ns
High to Low Level Output
Any Q
tPHL
Propagation Delay Time
Clear to
26
38
ns
High to Low Output
Any Q
Note 1
All typicals are at VCC e 5V TA e 25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3
With all outputs open inputs A through D grounded and 45V applied to S0 S1 CLEAR and the serial inputs ICC is tested with momentary ground then
45V applied to CLOCK
Logic Diagram
LS194A
TLF6407 – 2
Function Table
Inputs
Outputs
Clear
Mode
Clock
Serial
Parallel
QA
QB
QC
QD
S1
S0
Left
Right
A
B
C
D
L
X
X
X
X
X
XXXX
L
L
L
L
H
X
X
L
X
X
XXXX
QA0
QB0
QC0
QD0
HH
H
u
XX
a
b
c
d
a
b
c
d
HL
H
u
X
H
XXXX
H
QAn
QBn
QCn
HL
H
u
X
L
XXXX
L
QAn
QBn
QCn
HH
L
u
H
X
XXXX
QBn
QCn
QDn
H
HH
L
u
L
X
XXXX
QBn
QCn
QDn
L
H
L
L
X
X
X
XXXX
QA0
QB0
QC0
QD0
H e High Level (steady state) L e Low Level (steady state) X e Don’t Care (any input including transitions)
u e Transition from low to high level
a b c d e The level of steady state input at inputs A B C or D respectively
QA0 QB0 QC0 QD0 e The level of QA QB QC orQD respectively before the indicated steady state input conditions were established
QAn QBn QCn QDn e The level of QA QB QC respectively before the most-recent
u transition of the clock
3


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