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R7FS5D97C3A01CFC Datasheet(PDF) 10 Page - Renesas Technology Corp

Part # R7FS5D97C3A01CFC
Description  Microcontroller
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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R01DS0303EU0100 Rev.1.00
Page 10 of 115
Nov 3, 2016
S5D9
1. Overview
Table 1.11
Graphics
Feature
Functional description
Graphics LCD Controller (GLCDC)
The GLCDC provides multiple functions and supports various data formats and panels. Key
GLCDC features include:
 GPX bus master function for accessing graphics data
 Superimposition of three planes (single color background plane, graphic 1 plane, and
graphic 2 plane)
 Support for many types of 32- or 16-bit per pixel graphics data and 8-, 4-, or 1-bit LUT data
format
 Digital interface signal output supporting a video image size of WVGA or greater.
See section 58, Graphics LCD Controller (GLCDC) in User's Manual.
2D Drawing Engine (DRW)
The 2D Drawing Engine (DRW) provides flexible functions that can support almost any object
geometry rather than being bound to only a few specific geometries such as lines, triangles, or
circles. The edges of every object can be independently blurred or antialiased.
Rasterization is executed at one pixel per clock on the bounding box of the object from left to
right and top to bottom. The DRW can also raster from bottom to top to optimize the
performance in certain cases. In addition, optimization methods are available to avoid
rasterization of many empty pixels of the bounding box.
The distances to the edges of the object are calculated by a set of edge equations for every
pixel of the bounding box. These edge equations can be combined to describe the entire
object.
If a pixel is inside the object, it is selected for rendering. If it is outside, it is discarded. If it is on
the edge, an alpha value can be chosen proportional to the distance of the pixel to the nearest
edge for antialiasing.
Every pixel that is selected for rendering can be textured. The resulting aRGB quadruple can
be modified by a general raster operation approach independently for each of the four
channels. The aRGB quadruples can then be blended with one of the multiple blend modes of
the DRW.
The DRW provides two inputs (texture read and framebuffer read), and one output
(framebuffer write).
The internal color format is always aRGB (8888). The color formats from the inputs are
converted to the internal format on read and a conversion back is made on write.
See section 56, 2D Drawing Engine (DRW) in User's Manual.
JPEG Codec (JPEG)
The JPEG Codec (JPEG) incorporates a JPEG codec that conforms to the JPEG baseline
compression and decompression standard. This provides high-speed compression of image
data and high-speed decoding of JPEG data. See section 57, JPEG Codec (JPEG) in User's
Manual.
Parallel Data Capture Unit (PDC)
One PDC unit is provided for communicating with external I/O devices, including image
sensors, and transferring parallel data such as an image output from the external I/O device
through the DTC or DMAC to the on-chip SRAM and external address spaces (the CS and
SDRAM areas). See section 44, Parallel Data Capture Unit (PDC) in User's Manual.
Table 1.12
Data processing
Feature
Functional description
Cyclic Redundancy Check (CRC)
calculator
The CRC calculator generates CRC codes to detect errors in the data. The bit order of CRC
calculation results can be switched for LSB-first or MSB-first communication. Additionally,
various CRC-generating polynomials are available. The snoop function allows monitoring
reads from and writes to specific addresses. This function is useful in applications that require
CRC code to be generated automatically in certain events, such as monitoring writes to the
serial transmit buffer and reads from the serial receive buffer. See section 40, Cyclic
Redundancy Check (CRC) Calculator in User's Manual.
Data Operation Circuit (DOC)
The DOC compares, adds, and subtracts 16-bit data. See section 52, Data Operation Circuit
(DOC) in User's Manual.
Sampling Rate Converter (SRC)
The SRC converts the sampling rate of data produced by various audio decoders, such as the
WMA, MP3, and AAC. Both 16-bit stereo and monaural data are supported.
See section 42, Sampling Rate Converter (SRC) in User's Manual.


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