R5F52318BDND datasheet(5/177 Pages) RENESAS

Part #	R5F52318BDND

Description	54-MHz 32-bit RX MCUs, built-in FPU, 88.56 DMIPS, up to 512-KB flash memory

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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5 / 177 page

R01DS0261EJ0110 Rev.1.10

Page 5 of 177

Oct 30, 2015

RX230 Group, RX231 Group

1. Overview

Communication

functions

Serial Sound Interface (SSI)

 1 channel

 Capable of duplex communications

 Various serial audio formats supported

 Master/slave function supported

 Programmable word clock or bit clock generation function

 8/16/18/20/22/24/32-bit data formats supported

 On-chip 8-stage FIFO for transmission/reception

 Supports WS continue mode in which the SSIWS signal is not stopped.

SD Host Interface (SDHIa)

 1 channel

 Transfer speed : Default speed mode (8MB/s)

 SD memory card interface (1 bit / 4bits SD bus)

 MMC, eMMC Backward-compatible are supported.

 SD Specifications

Part 1: Compliant with Physical Layer Specification Ver.3.01 (Not support DDR)

Part E1: SDIO Specification Ver. 3.00

 Compliant with USB version 2.0

 Error check function: CRC7 (command), CRC16 (data)

 Interrupt Source: Card access interrupt, SDIO access interrupt, Card detection interrupt, SD buffer

access interrupt

 DMA transfer sources: SD_BUFwrite, SD_BUF read

 Card detection, Write protection

Security functions

 Access management circuit

 Encryption engine

128- or 256-bit key sizes of AES

Block cipher mode of operation: GCM, ECB, CBC, CMAC, XTS, CTR, GCTR

 Hash function

 True random number generator

 Unique ID

12-bit A/D converter (S12ADE)

 12 bits (24 channels × 1 unit)

 12-bit resolution

 Minimum conversion time: 0.83 µs per channel when the ADCLK is operating at 54 MHz

 Operating modes

Scan mode (single scan mode, continuous scan mode, and group scan mode)

Group A priority control (only for group scan mode)

 Sampling variable

Sampling time can be set up for each channel.

 Self-diagnostic function

 Double trigger mode (A/D conversion data duplicated)

 Detection of analog input disconnection

 A/D conversion start conditions

A software trigger, a trigger from a timer (MTU, TPU), an external trigger signal, or ELC

 Event linking by the ELC

Temperature sensor (TEMPSA)

 1 channel

 The voltage output from the temperature sensor is converted into a digital value by the 12-bit A/D

converter.

12-bit D/A converter (R12DAA)

 2 channels

 12-bit resolution

 Output voltage: 0.4 to AVCC0-0.5V

CRC calculator (CRC)

 CRC code generation for arbitrary amounts of data in 8-bit units

 Select any of three generating polynomials:

X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1

 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable.

Comparator B (CMPBa)

 2 channels × 2 units

 Function to compare the reference voltage and the analog input voltage

 Window comparator operation or standard comparator operation is selectable

Capacitive touch sensing unit (CTSU)

Detection pin: 24 channels

Data operation circuit (DOC)

Comparison, addition, and subtraction of 16-bit data

Power supply voltages/Operating frequencies

VCC = 1.8 to 2.4 V: 8 MHz, VCC = 2.4 to 2.7 V: 16 MHz, VCC = 2.7 to 5.5 V: 54 MHz

Operating temperature range

D version:

40 to +85°C, G version: 40 to +105°C

Packages

100-pin TFLGA (PTLG0100KA-A) 5.5 × 5.5 mm, 0.5 mm pitch

100-pin LFQFP (PLQP0100KB-B) 14 × 14 mm, 0.5 mm pitch

64-pin WFLGA (PWLG0064KA-A) 5 × 5 mm, 0.5 mm pitch

64-pin HWQFN (PWQN0064KC-A) 9 × 9 mm, 0.5 mm pitch

64-pin LFQFP (PLQP0064KB-C) 10 × 10 mm, 0.5 mm pitch

48-pin HWQFN (PWQN0048KB-A) 7 × 7 mm, 0.5 mm pitch

48-pin LFQFP (PLQP0048KB-B) 7 × 7 mm, 0.5 mm pitch

On-chip debugging system

E1 emulator (FINE interface)

Table 1.1

Outline of Specifications (4/4)

Classification

Module/Function

Description

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Similar Description - R5F52318BDND

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