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R5F563T6EGFL Datasheet(PDF) 6 Page - Renesas Technology Corp |
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R5F563T6EGFL Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 186 page R01DS0087EJ0220 Rev.2.20 Page 6 of 186 Mar 31, 2016 RX63T Group 1. Overview Communication function I2C bus interfaces (RIIC) 2 channels Communication formats I2C bus format/SMBus format Supports the multi-master Max. transfer rate: 400 kbps CAN module (CAN) 1 channels Compliance with the ISO11898-1 specification (standard frame and extended frame) 32 mailboxes per channel Serial peripheral interfaces (RSPI) 2 channels RSPI transfer facility Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPCK (RSPI clock) signals enables serial transfer through SPI operation (four lines) or clock-synchronous operation (three lines) Capable of handling serial transfer as a master or slave Data formats Switching between MSB first and LSB first The number of bits in each transfer can be changed to any number of bits from 8 to 16, or to 20, 24, or 32 bits. 128-bit buffers for transmission and reception Up to four frames can be transmitted or received in a single transfer operation (with each frame having up to 32 bits) Buffered structure Double buffers for both transmission and reception Max. transfer rate In master mode: [144-, 120-, 112- and 100-pin versions] 25 Mbps [64- and 48-pin versions] 12.5 Mbps In slave mode: 6.25 Mbps 12-bit A/D converter (S12ADB) [144-, 120-, 112- and 100-pin versions] 12 bits (4 channels x 2 unit) 12-bit resolution Conversion time 1.0 s per channel (clock for S12ADB, PCLKD (A/D conversion clock ADCLK) = 50 MHz, AVCC0 = 4.0 to 5.5 V) 2.0 s per channel (clock for S12ADB, PCLKD (A/D conversion clock ADCLK) = 25 MHz, AVCC0 = 3.0 to 3.6 V) Operating modes Scan mode (single-cycle scan mode/continuous scan mode/group scan mode) Group A priority control (only for the group scan mode) Sample-and-hold function A common sample-and-hold circuit for units is included. Additionally, sample-and-hold circuit for each unit is included. (three channels per unit) Self-diagnostic function The self-diagnostic function internally generates three analog input voltages (VREFL0, VREFH0 x 1/2, VREFH0). Double trigger mode (duplication of A/D converted data) Input signal amplification function using programmable gain amplifier (three channels per unit) Amplification factors: 2.0 times, 2.5 times, 3.077 times, 3.636 times, 4.0 times, 4.444 times, 5.0 times, 5.714 times, 6.667 times, 10.0 times, 13.333 times (total of 11 steps) Three ways to start A/D conversion Conversion can be started by software, a conversion start trigger from a timer (MTU3 or GPT), or an external trigger signal. Window comparators (three channels per unit) Table 1.1 Outline of Specifications (5/7) Classification Module/Function Description |
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