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TCA9535 Datasheet(PDF) 3 Page - Texas Instruments

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Part No. TCA9535
Description  Low-Voltage 16-Bit I2C and SMBus Low-Power I/O Expander with Interrupt Output and Configuration Registers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TCA9535 Datasheet(HTML) 3 Page - Texas Instruments

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INT
A1
A2
P00
P01
P02
P03
P04
P05
P06
P07
GND
V
CC
SDA
SCL
A0
P17
P16
P15
P14
P13
P12
P11
P10
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
A0
P17
P16
P15
P14
P13
24
22
21
20
19
23
7
9
10
11
12
8
P00
P01
P02
P03
P04
P05
1
2
3
4
5
6
18
17
16
15
14
13
Exposed
Center
Pad
3
TCA9535
www.ti.com
SCPS201D – AUGUST 2009 – REVISED JULY 2016
Product Folder Links: TCA9535
Submit Documentation Feedback
Copyright © 2009–2016, Texas Instruments Incorporated
5 Pin Configuration and Functions
DB, PW Package
24-Pin TSSOP
Top View
RTW, RGE Package
24-Pin WQFN, VQFN
Top View
The exposed center pad, if used, must be
connected as a secondary ground or left
electrically open.
(1)
If port is unused, it must be tied to either VCC or GND through a resistor of moderate value (about 10 kΩ)
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
NO.
DB, PW
RTW,
RGE
A0
21
18
Input
Address input 0. Connect directly to VCC or ground
A1
2
23
Input
Address input 1. Connect directly to VCC or ground
A2
3
24
Input
Address input 2. Connect directly to VCC or ground
GND
12
9
Ground
INT
1
22
Output
Interrupt output. Connect to VCC through an external pull-up resistor
P00(1)
4
1
I/O
P-port I/O. Push-pull design structure. At power on, P00 is configured as an input
P01(1)
5
2
I/O
P-port I/O. Push-pull design structure. At power on, P01 is configured as an input
P02(1)
6
3
I/O
P-port I/O. Push-pull design structure. At power on, P02 is configured as an input
P03(1)
7
4
I/O
P-port I/O. Push-pull design structure. At power on, P03 is configured as an input
P04(1)
8
5
I/O
P-port I/O. Push-pull design structure. At power on, P04 is configured as an input
P05(1)
9
6
I/O
P-port I/O. Push-pull design structure. At power on, P05 is configured as an input
P06(1)
10
7
I/O
P-port I/O. Push-pull design structure. At power on, P06 is configured as an input
P07(1)
11
8
I/O
P-port I/O. Push-pull design structure. At power on, P07 is configured as an input
P10(1)
13
10
I/O
P-port I/O. Push-pull design structure. At power on, P10 is configured as an input
P11(1)
14
11
I/O
P-port I/O. Push-pull design structure. At power on, P11 is configured as an input
P12(1)
15
12
I/O
P-port I/O. Push-pull design structure. At power on, P12 is configured as an input
P13(1)
16
13
I/O
P-port I/O. Push-pull design structure. At power on, P13 is configured as an input
P14(1)
17
14
I/O
P-port I/O. Push-pull design structure. At power on, P14 is configured as an input
P15(1)
18
15
I/O
P-port I/O. Push-pull design structure. At power on, P15 is configured as an input
P16(1)
19
16
I/O
P-port I/O. Push-pull design structure. At power on, P16 is configured as an input
P17(1)
20
17
I/O
P-port I/O. Push-pull design structure. At power on, P17 is configured as an input
SCL
22
19
Input
Serial clock bus. Connect to VCC through a pull-up resistor
SDA
23
20
Input
Serial data bus. Connect to VCC through a pull-up resistor
VCC
24
21
Supply voltage


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