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PCM1860-Q1 Datasheet(PDF) 5 Page - Texas Instruments |
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PCM1860-Q1 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 141 page  5 PCM1860-Q1, PCM1861-Q1, PCM1862-Q1 PCM1863-Q1, PCM1864-Q1, PCM1865-Q1 www.ti.com SLASE64A – DECEMBER 2014 – REVISED JUNE 2017 Product Folder Links: PCM1860-Q1 PCM1861-Q1 PCM1862-Q1 PCM1863-Q1 PCM1864-Q1 PCM1865-Q1 Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Revision History (continued) • Changed text in Bypassing the Internal LDO to Reduce Power Consumption section to clarify TDM mode with 1.8-V IOVDD operation .................................................................................................................................................................. 61 • Added text "The I 2C control port.." to the I2C Interface section............................................................................................ 64 • Changed pin numbers in Table 22 from "15, 16, 14" to "23, 24, 25" ................................................................................... 64 • Added Real World Software Configuration using EnergySense and Controlsense section................................................. 65 • Added more detail toProgramming DSP Coefficients on Software-Controlled Devices section, and moved to new location ................................................................................................................................................................................. 68 • Added Hardware Control section ......................................................................................................................................... 71 • Added Dual PCM186x-Q1 TDM Functionality section ......................................................................................................... 73 • Added new paragraph to end of Analog Front-End Circuit For Single-Ended, Line-In Applications section ....................... 74 • Added design examples and associated subsections to Typical Application section .......................................................... 75 • Changed 1.8-V Support section; clarified that both IOVDD and LDO must be driven with 1.8 V in 1.8-V mode ................ 79 • Added Brownout Conditions section..................................................................................................................................... 79 • Added test condition to step 3 in Power Up Sequence section; (PLL requires < 250 µs) ................................................... 80 • Changed Layout section for clarity ...................................................................................................................................... 84 • Deleted old Figure 64, PCM1865-Q1 EVM Signal Partitioning; redundant, and same information shown in Figure 74 .... 84 • Changed Figure 75 for clarity ............................................................................................................................................... 85 • Changed "0xFF" to "0xFE" in last sentence of Register Map Description section ............................................................... 85 • Changed values for register 3, bits 6-0; changed from "RSV" to correct bit names ........................................................... 86 • Changed bits 4 and 3 from 1 and 0 to RSV, respectively, in register 27 ............................................................................. 86 • Changed register 44 (0x2C) from reserved ("RSV") to actual bit names ............................................................................. 87 • Changed registers 52 and 53 to registers 51 and 52, respectively ...................................................................................... 87 • Changed TX_WLEN bit option 00 description from "Reserved" to "32-bit" in Page 0, register 11 ...................................... 95 • Changed GPIO0_FUNC for 001 from "SPI MISO (Out:Default)" to "Digital MIC Input 0 (In)" and for 010 from "RESERVED" to "SPI MISO (Out)" in register 16 ................................................................................................................ 98 • Changed "DPGA" to "APGA" in description column for bits 3, 2, 1, and 0 in register 25 .................................................. 104 • Changed DIV_NUM default value in page 0, register 33 from "000 0001" to "000 0000" ................................................. 106 • Changed names and descriptions of master mode clock dividers in registers 37, 38, and 39 for clarity .......................... 108 • Changed "Divider" to "Multiplier" in R[3:0] description for register 42................................................................................ 110 • Changed values for R[3:0] from 1, 1/2, 1/3, 1/4, and 1/16 to 1, 2, 3, 4, and 16, respectively .......................................... 110 • Changed "Divider" to "Multiplier" in J[5:0] description for register 43 ................................................................................ 111 • Changed "Divider" to "Multiplier" in D_LSB[7:0] description for register 44 ....................................................................... 111 • Changed "Divider" to "Multiplier" in D_MSB[5:0] description for register 45 ...................................................................... 111 • Changed register 52 to register 51..................................................................................................................................... 114 • Changed register 53 to register 52..................................................................................................................................... 115 • Changed bit 3 from CLKERR to RSV in register 96........................................................................................................... 123 • Deleted bit 3 from CLKERR to RSV in register 97 ............................................................................................................. 124 • Changed default values in page 1: register 1 for bits 4, 2, 1, and 0 from "1" to "0", and updated descriptions for clarity. 129 |
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Similar Description - PCM1860-Q1 |
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