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853S54I-01 Datasheet(PDF) 11 Page - Integrated Device Technology |
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853S54I-01 Datasheet(HTML) 11 Page - Integrated Device Technology |
11 / 20 page 11 ©2017 Integrated Device Technology, Inc. June 16, 2017 853S54I-01 Datasheet 2.5V Differential Clock Input Interface The IN /nIN accepts LVPECL, CML, LVDS and other differential signals. Both VSWING and VOH must meet the VPP and VCMR input requirements. Figures 3A to 3D show interface examples for the IN /nIN input driven by the most common driver types. The input interfaces suggested here are examples only. If the driver is from another vendor, use their termination recommendation. Please consult with the vendor of the driver component to confirm the driver termination requirements. Figure 3A. IN/nIN Input Driven by an Open Collector CML Driver Figure 3C. IN/nIN Input Driven by a 3.3V LVPECL Driver Figure 3B. IN/nIN Input Driven by a Built-In Pullup CML Driver Figure 3D. IN/nIN Input Driven by a 3.3V LVDS Driver IN nIN LVPECL Differential Inputs CML 3.3V Zo = 50 Ω Zo = 50 Ω 3.3V 2.5V R1 50 Ω R2 50 Ω R1 125 Ω R3 125 Ω R2 84 Ω R4 84 Ω 3.3V Zo = 50 Ω Zo = 50 Ω IN nIN 3.3V 2.5V LVPECL LVPECL Differential Input 3.3V R1 100 Ω CML Built-In Pullup IN nIN 2.5V Zo = 50 Ω Zo = 50 Ω LVPECL Differential Inputs 3.3V R1 100 Ω LVDS IN nIN 2.5V Zo = 50 Ω Zo = 50 Ω LVPECL Differential Inputs |
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Similar Description - 853S54I-01_17 |
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