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853S9252BKILF Datasheet(PDF) 1 Page - Integrated Device Technology |
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853S9252BKILF Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 21 page DATASHEET 2.5V, 3.3V ECL/LVPECL Clock/Data Fanout Buffer ICS853S9252I ICS853S9252BKI JUNE 14, 2017 1 ©2017 Integrated Device Technology, Inc. General Description The ICS853S9252I is a 2.5V/3.3V ECL/LVPECL fanout buffer designed for high-speed, low phase-noise wireless infrastructure applications. The device fanouts a differential input signal to two ECL/LVPECL outputs. Optimized for low additive phase-noise, sub-100ps output rise and fall times, low output skew and high-frequencies, the ICS853S9252I is an effective solution for high-performance clock and data distribution applications, for instance driving the reference clock inputs of ADC/DAC circuits. Internal input termination, a bias voltage output (VREF) for AC-coupling and small packaging (3.0mm x 3.0mm 16-lead VFQFN) supports space-efficient board designs. The ICS853S9252I operates from a full 2.5V or 3.3V power supply and supports the industrial temperature range of -40°C to 85°C. The extended temperature range also supports wireless infrastructure, tele-communication and networking end equipment requirements. Features • 1:2 differential clock/data fanout buffer • Clock frequency: 3GHz (maximum) • Two differential 2.5V/3.3V ECL/LVPECL clock output • Differential input accepts ECL/LVPECL, LVDS and CML levels • Additive phase jitter, RMS @ 122.88MHz: 45fs (typical) • Propagation delay: 175ps (maximum), V CC = 3.3V • Output rise/fall time: 135ps (maximum), V CC = 3.3V • Internal input signal termination • Supply voltage: 2.5V-5% to 3.3V+10% • Lead-free (RoHS 6) packaging • -40°C to 85°C ambient operating temperature Block Diagram Pin Assignment ICS853S9252I 16 lead VFQFN 3.0mm x 3.0mm x 0.925mm package body K Package Top View IN nIN VTT VREF Q0 nQ0 Q1 nQ1 VREF Generator 50 50 IN nIN nc nc Q0 nQ0 Q1 nQ1 1 2 3 4 5 6 7 8 12 11 10 9 16 15 14 13 |
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