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LT1797 Datasheet(PDF) 8 Page - Linear Technology |
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LT1797 Datasheet(HTML) 8 Page - Linear Technology |
8 / 12 page 8 LT1797 APPLICATIO S I FOR ATIO Supply Voltage The positive supply pin of the LT1797 should be bypassed with a small capacitor (about 0.1 µF) within an inch of the pin. When driving heavy loads an additional 4.7 µF electro- lytic capacitor should be used. When using split supplies the same is true for the negative supply pin. Inputs The LT1797 is fully functional for an input signal range from the negative supply to the positive supply. Figure 1 shows a simplified schematic of the amplifier. The input stage consists of two differential amplifiers, a PNP stage Q3/Q4 and an NPN stage Q1/Q2 that are active over different ranges of input common mode voltage. The PNP differential pair is active for input common mode voltages VCM between the negative supply to approximately 1.2V below the positive supply. As VCM moves closer toward the positive supply, the transistor QB1 will steer the tail current I1 to the current mirror Q5/Q6, activating the NPN differential pair and the PNP pair becomes inactive for the rest of the input common mode range up to the positive supply. The input offset voltage and the input bias current are dependent on which input stage is active. The input offset voltage is trimmed on a single 5V supply with the common mode at 1/2 supply and is typically 1mV with the PNP stage active. The input offset of the NPN stage is untrimmed and is typically 1.5mV. The input bias current polarity depends on the input common mode voltage. When the PNP differential pair is active, the input bias currents flow out of the input pins. They flow in the opposite direction when the NPN input stage is active. The offset error due to the input bias currents can be minimized by equalizing the noninverting and inverting source impedance. The input stage of the LT1797 incorporates phase reversal protection to prevent false outputs from occurring when the inputs are driven up to 5V beyond the rails. Protective resistors are included in the input leads so that current does not become excessive when the inputs are forced beyond the supplies or when a large differential signal is applied. Output The output is configured with a pair of complementary common emitter stages Q19/Q20, which enable the out- put to swing from rail-to-rail. The output voltage swing of the LT1797 is affected by input overdrive as shown in the Typical Performance Characteristics. When monitoring input voltages within 50mV of V+ or within 8mV of V–, some gain should be taken to keep the output from clipping. The output of the LT1797 can deliver large load currents; the short-circuit current limit is typically 50mA at ±5V. Take care to keep the junction temperature of the IC below the absolute maximum rating of 150 °C. The output of the amplifier has reverse biased diodes to each supply. If the output is forced beyond either supply, unlimited current will flow through these diodes. The LT1797 can drive capacitive loads up to 200pF on a single 5V supply in a unity gain configuration. When there is a need to drive larger capacitive loads, a resistor of a couple hundred ohms should be connected between the output and the capacitive load. The feedback should still be taken from the output so that the resistor isolates the capacitive load to ensure stability. The low input bias current of the LT1797 makes it possible to use high value feedback resistors to set the gain. However, care must be taken to insure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. |
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