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IDT72V11165 Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. IDT72V11165
Description  3.3 VOLT MULTIMEDIA FIFO 256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16, and 4,096 x 16
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT72V11165 Datasheet(HTML) 2 Page - Integrated Device Technology

   
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IDT72V11165/72V12165/72V13165/72V14165/72V15165 3.3V MULTIMEDIA FIFO
256 x 16, 512 x 16, 1,024 x 16, 2,048 x 16 and 4,096 x 16
INDUSTRIAL
TEMPERATURERANGE
PIN CONFIGURATIONS
STQFP (PP64-1, order code: TF)
TOP VIEW
PIN 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Q2
Q3
GND
Q4
Q5
VCC
Q6
Q7
GND
Q8
Q9
Q10
Q11
GND
Q12
VCC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
GND
6359 drw02
PIN DESCRIPTION
Symbol
Name
I/O
Description
D0–D15
Data Inputs
I
Data inputs for an 16-bit bus.
EF
Empty Flag
O
EF indicates whether or not the FIFO memory is empty.
FF
Full Flag
O
FF indicates whether or not the FIFO memory is full.
HF
Half-Full Flag
O
The device is more than half full when
HF is LOW.
OE
OutputEnable
I
When
OE is LOW, the data output bus is active. IfOE isHIGH,theoutputdatabuswillbeinahigh-impedance
state.
Q0–Q15
DataOutputs
O
Data outputs for an 16-bit bus.
RCLK
Read Clock
I
When
RENisLOW,dataisreadfromtheFIFOonaLOW-to-HIGHtransitionofRCLK,iftheFIFOisnotempty.
REN
Read Enable
I
When
RENisLOW,dataisreadfromtheFIFOoneveryLOW-to-HIGHtransitionofRCLK. WhenRENisHIGH,
the output register holds the previous data. Data will not be read from the FIFO if the
EF is LOW.
RS
Reset
I
When
RS is set LOW, internal read and write pointers are set to the first location of the RAM array, FF
goes HIGH, and
EF goes LOW. A reset is required before an initial WRITE after power-up.
WCLK
WriteClock
I
When
WENis LOW, data is written into the FIFO on a LOW-to-HIGH transition of WCLK, if the FIFO is not full.
WEN
WriteEnable
I
When
WEN is LOW, data is written into the FIFO on every LOW-to-HIGH transition of WCLK. When WEN is
HIGH, the FIFO holds the previous data. Data will not be written into the FIFO if the
FF is LOW.
VCC
Power
I
+3.3V power supply pins.
GND
Ground
I
Ground pins.
NOTE:
1. DNC = Do Not Connect.


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