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FDC37N972 Datasheet(PDF) 29 Page - SMSC Corporation |
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FDC37N972 Datasheet(HTML) 29 Page - SMSC Corporation |
29 / 390 page 29 LOGICAL DEVICE NUMBER LOGICAL DEVICE BASE I/O RANGE (NOTE3) FIXED BASE OFFSETS ISA CYCLE TYPE 0x04 Serial Port 1 [0x100:0x0FF8] ON 8 BYTE BOUNDARIES +0 : RB/TB LSB div +1 : IER MSB div +2 : IIR/FCR +3 : LCR +4 : MCR +5 : LSR +6 : MSR +7 : SCR NOWS 0x05 Infrared Port [0x100:0x0FF8] ON 8 BYTE BOUNDARIES +0 : RB/TB LSB div +1 : IER MSB div +2 : IIR/FCR +3 : LCR +4 : MCR +5 : LSR +6 : MSR +7 : SCR NOWS 0x62, 0x63 [0x100:0x0FF8] ON 8 BYTE BOUNDARIES +0 : Register Block N, address 0 +1 : Register Block N, address 1 +2 : Register Block N, address 2 +3 : Register Block N, address 3 +4 : Register Block N, address 4 +5 : Register Block N, address 5 +6 : Register Block N, address 6 +7 : SCE Master Control Reg. 0x06 RTC Not Relocatable Fixed Base Address 0x70, 0x74 : Address Register 0x71, 0x76 : Data Register NOWS Std. ISA I/O 0x07 KYBD Not Relocatable Fixed Base Address 0x60 : Data Register 0x64 : Command/Status Reg. NOWS Note 1: Refer to the configuration register descriptions for setting the base address Note 2: This chip uses all ISA address bits to decode the base address of each of its logical devices. |
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