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TDA7492ETR Datasheet(PDF) 11 Page - STMicroelectronics |
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TDA7492ETR Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 24 page TDA7492E Application information DocID027638 Rev 1 11/24 4 Application information 4.1 Gain setting The four gain settings of the TDA7492E are set by GAIN (pin 31). Internally, gain is set by changing the feedback resistors of the amplifier. Table 8: Gain settings Voltage on GAIN pin Total gain Application recommendations VGAIN < 0.25*VDDS 20.8 dB GAIN pin connected to SGND 0.25*VDDS < VGAIN < 0.5*VDDS 26.8 dB External resistor divider <100 k 0.5*VDDS < VGAIN < 0.75*VDDS 30 dB External resistor divider <100 k VGAIN > 0.75*VDDS 32.8 dB GAIN pin connected to VDDS 4.2 Stereo and mono applications The TDA7492E can be used in stereo BTL or in mono BTL configuration. When the input pins, INPB and INNB of the right channel are directly shorted to VDDS (without input capacitors) the device is in mono configuration as shown in Figure 3: "Mono BTL settings". Figure 3: Mono BTL settings 4.3 Smart protections 4.3.1 Overcurrent protection (OCP) If the overcurrent protection threshold is reached, the power stage will be shut down immediately. The device will recover automatically when the fault is removed. The overcurrent protection scheme is shown in Table 9: "Overcurrent protection". Two typical thresholds are as follows. Table 9: Overcurrent protection I (Shutdown) High side (A) 11.2 Low side (A) 10.0 INPA INNA INPB INNB OUTNB OUTNA OUTPA OUTPB IC LC Filter |
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