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LT1767 Datasheet(PDF) 7 Page - Linear Technology |
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LT1767 Datasheet(HTML) 7 Page - Linear Technology |
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7 / 28 page  7 LT1766/LT1766-5 1766fa The current fed system will have 90 ° phase shift at a much lower frequency, but will not have the additional 90 ° shift until well beyond the LC resonant frequency. This makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response. Most of the circuitry of the LT1766 operates from an internal 2.9V bias line. The bias regulator normally draws power from the regulator input pin, but if the BIAS pin is connected to an external voltage higher than 3V, bias power will be drawn from the external source (typically the BLOCK DIAGRA Figure 1. LT1766 Block Diagram – + Σ VIN 2.9V BIAS REGULATOR 200kHz OSCILLATOR FREQUENCY FOLDBACK SW FB GND 1, 8, 9, 16, 17 1766 F01 SLOPE COMP ANTISLOPE COMP BIAS INTERNAL VCC SYNC 0.4V 5.5 µA CURRENT COMPARATOR RLIMIT RSENSE ERROR AMPLIFIER gm = 2000µMho Q2 FOLDBACK CURRENT LIMIT CLAMP BOOST RS FLIP-FLOP DRIVER CIRCUITRY S R Q1 POWER SWITCH 1.22V 4 10 14 SHDN 15 6 2 12 11 VC LOCKOUT COMPARATOR SHUTDOWN COMPARATOR 2.38V ×1 Q3 VC(MAX) CLAMP regulated output voltage). This will improve efficiency if the BIAS pin voltage is lower than regulator input voltage. High switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the input voltage, allowing switch to be saturated. This boosted voltage is generated with an external capacitor and diode. Two comparators are connected to the shutdown pin. One has a 2.38V threshold for under- voltage lockout and the second has a 0.4V threshold for complete shutdown. |
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