TPS62100, TPS62101, TPS62102, TPS62103

MULTIMODE LOW POWER BUCK CONVERTER

SLUS446B – MAY 2000 – REVISED DECEMBER 2000

5

POST OFFICE BOX 655303

SD/SYNC = 0 V. (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Pulse Width Modulator Section

TPS62100,

300 kHz version,

VIN = 5 V

225

300

375

kHz

SW switching frequency

TPS62101,

600 kHz version,

VIN = 5 V

450

600

750

kHz

SW switching frequency

TPS62102,

1 MHz version,

VIN = 5 V

0.75

1

1.25

MHz

TPS62103,

2 MHz version,

VIN = 5 V

1.5

2

2.5

MHz

TPS62100,

300 kHz version,

VIN = 5 V,

See Notes 1 and 2

490

kHz

Maximum sync frequency

TPS62101,

600 kHz version,

VIN = 5 V,

See Notes 1 and 2

966

kHz

Maximum sync. frequency

TPS62102,

1 MHz version,

VIN = 5 V,

See Notes 1 and 2

1.61

MHz

TPS62103,

2 MHz version,

VIN = 5 V,

See Notes 1 and 2

2.5

MHz

Maximum duty cycle

COMP = 2.5 V

100%

Minimum duty cycle

COMP = 0 V

0%

Output Switch Section

SW NFET RDS(on)

ISW = 500 mA

VIN = 7.2 V

0.3

0.6

Ω

SW PFET RDS(on)

ISW = –500 mA

VIN = 7.2 V

0.5

1

Ω

SW NFET RDS(on)

ISW = 500 mA

VIN = 3.6 V

0.6

1.2

Ω

SW PFET RDS(on)

ISW = –500 mA

VIN = 3.6 V

0.8

1.6

Ω

SW output leakage

SW = 4.5V

VIN = 9 V

–10

0

10

µA

SW charge switch current limit 1

Terminates pulse

0.65

0.95

1.25

A

SW charge switch current limit 2

Initiates soft-start,

See Note 1

0.75

1.15

1.55

A

SW current, light-load mode

Peak inductor current

112

160

208

mA

Shutdown and Synchronization Section

SD/SYNC threshold

0.5

1

2.3

V

SD/SYNC input current

SD/SYNC = 0 V

–100

0

100

nA

SD/SYNC input current

SD/SYNC = 7.2 V

–1

0

1

µA

Maximum synchronization pulse width

25

37

µs

Minimum synchronization pulse width

50

ns

Three–State Mode Control Input Section

Light-load MODE threshold

225

300

410

mV

Constant frequency MODE threshold

475

600

750

mV

Open circuit MODE voltage

375

450

510

mV

MODE input-low current

Mode = 0 V

–20

–12

–5

µA

MODE input-high current

Mode = 1.4 V

10

22

33

µA

NOTES:

1. Ensured by design. Not production tested.

2. Minimum synchronization frequency must be less than the natural running frequency.