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IDT72T6360 2.5V, SEQUENTIAL FLOW-CONTROL DEVICE

x9, x18, x36 BIT WIDE CONFIGURATION

COMMERCIALANDINDUSTRIAL

TEMPERATURERANGES

FEBRUARY 10, 2009

Table of Contents

Features ......................................................................................................................................................................................................................... 1

Description ...................................................................................................................................................................................................................... 4

Pin Configuration ............................................................................................................................................................................................................. 6

Pin Descriptions .......................................................................................................................................................................................................... 7-10

-Read Port Interface ............................................................................................................................................................................... 7

-Write Port Interface ................................................................................................................................................................................ 7

-Memory Interface .................................................................................................................................................................................. 8

-Control and Feature Interface ............................................................................................................................................................... 8

-Power and Ground Signals ................................................................................................................................................................. 10

Detailed Descriptions ..................................................................................................................................................................................................... 11

Functional Descriptions .................................................................................................................................................................................................. 22

Signal Descriptions ........................................................................................................................................................................................................ 23

Device Characteristics ................................................................................................................................................................................................... 27

AC Test Conditions ........................................................................................................................................................................................................ 29

AC Electrical Characteristics ........................................................................................................................................................................................... 30

JTAG Timing Specifications ............................................................................................................................................................................................ 45

Depth Expansion Configuration ..................................................................................................................................................................................... 49

Width Expansion Configuration ...................................................................................................................................................................................... 50

List of Tables

Table 1 – DDR SDRAM Minimum Specifications ............................................................................................................................................................. 11

Table 2 – Supported Memory Vendors .......................................................................................................................................................................... 11

Table 3 – Total Possible External Memory Configurations ............................................................................................................................................... 12

Table 4 – SFC to DDR SDRAM interface connections .................................................................................................................................................... 14

Table 5 – Total useable memory based on various configurations ................................................................................................................................... 18

Table 6 – IDT72T6360 Maximum Frequency Based on 166MHz DDR SDRAM ............................................................................................................ 19

Table 7 – IDT72T6360 Maximum Frequency Based on 133MHz DDR SDRAM ............................................................................................................ 19

Table 8 – MIC[2:0] Configurations .................................................................................................................................................................................. 20

Table 9 – Memory Configurations Settings ..................................................................................................................................................................... 21

Table 10 – Device configuration ..................................................................................................................................................................................... 22

Table 12– Number of Bits Required for Offset Registers .................................................................................................................................................. 22

Table 11– Default Programmable Flag Offsets ................................................................................................................................................................. 22

Table 13 – Bus-Matchings ............................................................................................................................................................................................. 24

Table 14 – MTYPE[1:0] Configurations .......................................................................................................................................................................... 25

Table 15 – Parameters affected by I/O selection ............................................................................................................................................................. 25