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844201BKI-45LFT Datasheet(PDF) 11 Page - Integrated Device Technology |
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844201BKI-45LFT Datasheet(HTML) 11 Page - Integrated Device Technology |
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11 / 16 page  ICS844201I-45 Data Sheet FEMTOCLOCK® CRYSTAL-TO-LVDS CLOCK GENERATOR ICS844201BKI-45 MAY 27, 2017 11 ©2017 Integrated Device Technology, Inc. Schematic Example Figure 4 shows an example of ICS844201I-45 application schematic. In this example, the device is operated at VDD = 3.3V. The 18pF parallel resonant 25MHz crystal is used. The C1 = 27pF and C2 = 27pF are recommended for frequency accuracy. For different board layouts, the C1 and C2 may be slightly adjusted for optimizing frequency accuracy. Two examples of LVDS for receiver without built-in termination are shown in this schematic. Figure 4. ICS844201I-45 Schematic Example R1 100 VDD=3.3V R4 50 Set Logic Input to '1' Q VDD Logic Input Pin Examples Zo = 50 Ohm C1 27pF XTAL_OUT Zo = 50 Ohm C9 0.1uF FSEL RD1 Not Install VDD nQ Zo = 50 Ohm Q + - XTAL_IN To Logic Input pins nQ 1 8 p F VDD R3 50 Set Logic Input to '0' Zo = 50 Ohm RU2 Not Install U1 1 2 3 4 9 10 11 12 nc XTAL_OUT XTAL_IN FSEL nc VDD nQ Q + - X1 25 MHz RU1 1K Alternate LVDS Termination To Logic Input pins C2 27pF C3 0.01u RD2 1K |
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