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AS4C64M16D2 Datasheet(PDF) 11 Page - Alliance Semiconductor Corporation

Part # AS4C64M16D2
Description  JEDEC Standard Compliant
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C64M16D2 Datasheet(HTML) 11 Page - Alliance Semiconductor Corporation

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AS4C64M16D2
Alliance Memory Inc. reserves the right to change products or specification without notice.
11
Rev. 1.1
April. /2012
Table 4. Extended Mode Register EMR (1) Bitmap
BA2 BA1 BA0 A12 A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0 Address Field
0
*3
0
1
Qoff
0
*3
DQS#
OCD program
Rtt
Additive Latency
Rtt
D.I.C DLL Extended Mode Register
BA1
BA0
MRS mode
A6
A2
Rtt(NOMINAL)
0
0
MR
0
0
ODT Disable
A0
DLL Enable
0
1
EMR(1)
0
1
75Ω
0
Enable
1
0
EMR(2)
1
0
150Ω
1
Disable
1
1
EMR(3)
1
1
50Ω
A9
A8
A7
OCD Calibration Program
A1
Output Driver
Impedance Control
0
0
0
OCD Calibration mode exit; maintain setting
0
0
1
Reserved
0
Full strength
0
1
0
Reserved
1
Reduced strength
1
0
0
Reserved
1
1
1
OCD Calibration default
*1
A5 A4 A3
Additive Latency
0
0
0
0
A12
Qoff
*2
0
0
1
1
0
Output buffer enabled
0
1
0
2
A10
DQS#
1
Output buffer disabled
0
1
1
3
0
Enable
1
0
0
4
1
Disable
1
0
1
5
1
1
0
Reserved
1
1
1
Reserved
NOTE 1: After setting to default, OCD calibration mode needs to be exited by setting A9-A7 to 000.
NOTE 2: Output disabled – DQs, DQSs, DQSs#.This feature is intended to be used during IDD characterization of read current.
NOTE 3: A11 and BA2 are reserved for future use and must be set to 0 when programming the MR.


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