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AS4C32M16MS-6BIN Datasheet(PDF) 9 Page - Alliance Semiconductor Corporation |
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AS4C32M16MS-6BIN Datasheet(HTML) 9 Page - Alliance Semiconductor Corporation |
9 / 48 page An~ A3 A4 A2 A1 A0 A10 A9 A8 A7 A6 A5 Address Bus (Ax) TCSR** PASR Mode Register A6 A5 Drive Strength 00 Full 01 1/2 10 1/4 11 3/4 all have to be set to "0" BA0 BA1 Partial-Array Self Refresh: A2 A1 A0 banks to be self-refreshed 0 0 0 all banks 0 0 1 1/2 array (BA1=0) 0 1 0 1/4 array (BA1=0, BA0=0) 0 1 1 Reserved 1 0 0 Reserved 1 0 1 1/8 array (BA1=BA0=0, RA11=0) 1 1 0 1/16 array (BA1=BA0=0, RA11=RA10=0) 1 1 1 Reserved 1*) 0*) *)BA1 and BA0 must be 1, 0 to select the Extended Mode Register (Vs. the Mode Register) The extended Mode Register can be set during the initialization sequence. Once the device is operational, the extended Mode Register set can be issued anytime when the part is idle. DS Drive Strength Extended grade does not guarantee self-refresh function. * *On-die temperature sensor is used in place of TCSR. Setting these bits will have no effect. Extended Mode Register Table AS4C32M16MS-7BCN / AS4C32M16MS-6BIN AS4C16M32MS-7BCN / AS4C16M32MS-6BIN Confidential - 9/48 - Rev.1.0 June 2016 |
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