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ACS780XLR Datasheet(PDF) 7 Page - Allegro MicroSystems

Part No. ACS780XLR
Description  Core-less, micro-sized, 100 A continuous current package
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Maker  ALLEGRO [Allegro MicroSystems]
Homepage  http://www.allegromicro.com
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ACS780XLR Datasheet(HTML) 7 Page - Allegro MicroSystems

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High-Precision Linear Hall-Effect-Based
Current Sensor IC With 200 µΩ Current Conductor
ACS780xLR
7
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
X050U PERFORMANCE CHARACTERISTICS1: TOP = –40°C to 150°C, VCC= 5 V, unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Primary Sampled Current
IP
0
50
A
Sensitivity2
SensTA
Measured using 50% of full scale IP, TA = 25°C
58.1
60
61.95
mV/A
Sens(TOP)HT Measured using 50% of full scale IP, TOP = 25°C to 150°C
58.05
60
61.95
mV/A
Sens(TOP)LT Measured using 50% of full scale IP, TOP = –40°C to 25°C
57.75
60
62.25
mV/A
Noise4
VNOISEPP
Peak-to-peak, TA= 25°C, 1 nF on VOUT pin to GND
54
mV
INOISE
Input referred
0.4
mARMS
/
√(Hz)
Nonlinearity
ELIN
Measured at VOUT around 3.5 V and 4.5 V
–1
1
%
Electrical Offset Voltage5,6
VOE(TA)
IP = 0 A, TA = 25°C
–10
±3
10
mV
VOE(TOP)HT IP = 0 A, TOP = 25°C to 150°C
–10
±5
10
mV
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C
–20
±10
20
mV
Electric Offset Voltage Over
Lifetime3
ΔVOE(LIFE)
TOP = –40°C to 150°C, estimated shift after AEC-Q100 grade 0
qualification testing
±1
mV
Total Output Error
ETOT(HT)
Measured using 50% of full scale IP, TOP = 25°C to 150°C
–3.25
±0.8
3.25
%
ETOT(LT)
Measured using 50% of full scale IP, TOP = –40°C to 25°C
–3.75
±1.5
3.75
%
Total Output Error Including
Lifetime Drift7
ETOT(HT,LIFE) Measured using 50% of full scale IP, TOP = 25°C to 150°C
–4.1
±2.28
4.1
%
ETOT(LT,LIFE) Measured using 50% of full scale IP, TOP = –40°C to 25°C
–5.6
±2.98
5.6
%
1
See Characteristic Performance Data page for parameter distributions over temperature range.
2
This parameter may drift a maximum of ΔSensLIFE over lifetime.
3
Based on characterization data obtained during standardized stress test for Qualification of Integrated Circuits, including Package Hysteresis. Cannot
be guaranteed. Drift is a function of customer application conditions. Please contact Allegro MicroSystems for further information.
4
±3 sigma noise voltage.
5
Drift is referred to ideal VOUT(QU) = 0.5 V.
6
This parameter may drift a maximum of ΔVOE(LIFE) over lifetime.
7
The maximum drift of any single device during qualification testing was 4%.


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