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AS4C8M16SA-6BAN Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation

Part # AS4C8M16SA-6BAN
Description  Auto Refresh and Self Refresh
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C8M16SA-6BAN Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation

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AS4C8M16SA-Automotive
Confidential
1
Rev. 2.0
Mar. /2015
128M
– (8M x 16 bit) Synchronous DRAM (SDRAM)
Confidential
Advanced (Rev. 2.0, Mar. /2015)
Features
 Fast access time from clock: 5 ns
 Fast clock rate: 166 MHz
 AEC-Q100 Compliant
 Fully synchronous operation
 Internal pipelined architecture
 2M word x 16-bit x 4-bank
 Programmable Mode registers
- CAS Latency: 2, or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: Sequential or Interleaved
- Burst stop function
 Auto Refresh and Self Refresh
 4096 refresh cycles/32ms
 Automotive Temperature: TA = -40~105℃
 CKE power down mode
 Single +3.3V  0.3V power supply
 Interface: LVTTL
 54-pin 400 mil plastic TSOP II package
- Pb free and Halogen free
 54-ball 8.0 x 8.0 x 1.2mm (max) FBGA package
- Pb free and Halogen free
Overview
The 128Mb SDRAM is a high-speed CMOS
synchronous DRAM containing 128 Mbits. It is
internally configured as 4 Banks of 2M word x 16
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal,
CLK). Read and write accesses to the SDRAM are
burst oriented; accesses start at a selected location
and continue for a programmed number of locations
in a programmed sequence. Accesses begin with
the registration of a BankActivate command which
is then followed by a Read or Write command.
The SDRAM provides for programmable Read
or Write burst lengths of 1, 2, 4, 8, or full page, with
a burst termination option. An auto precharge
function may be enabled to provide a self-timed row
precharge that is initiated at the end of the burst
sequence. The refresh functions, either Auto or Self
Refresh are easy to use.
By having a programmable mode register, the
system can choose the most suitable modes to
maximize its performance. These devices are well
suited for applications requiring high memory
bandwidth and particularly well suited to high
performance PC applications.
Table 1. Key Specifications
AS4C8M16SA-Automotive
-6
tCK3
Clock Cycle time(min.)
6
ns
tAC3
Access time from CLK (max.)
5
ns
tRAS
Row Active time(min.)
42 ns
tRC
Row Cycle time(min.)
60 ns
Table 2.Ordering Information
Part Number
Frequency
Package
Temperature
Temp Range
AS4C8M16SA-6BAN
166MHz
54-Ball FBGA
Automotive
-40~105℃
AS4C8M16SA-6TAN
166MHz
54-Pin TSOPII Automotive
-40~105℃
B: indicates FBGA package
T: indicates TSOP II package
A: Automotive
N: indicates Pb and Halogen Free


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