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AS4C512M8D3-12BAN Datasheet(PDF) 2 Page - Alliance Semiconductor Corporation |
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AS4C512M8D3-12BAN Datasheet(HTML) 2 Page - Alliance Semiconductor Corporation |
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2 / 83 page  Features • JEDEC Standard Compliant • Power supplies: VDD & VDDQ = +1.5V ± 0.075V • Operating temperature: -40~105 °C(TC) • AEC-Q100 Compliant • Supports JEDEC clock jitter specification • Fully synchronous operation • Fast clock rate: 667/800MHz • Differential Clock, CK & CK# • Bidirectional differential data strobe -DQS & DQS# • 8 internal banks for concurrent operation • 8n-bit prefetch architecture • Pipelined internal architecture • Precharge & active power down • Programmable Mode & Extended Mode registers • Additive Latency (AL): 0, CL-1, CL-2 • Programmable Burst lengths: 4, 8 • Burst type: Sequential / Interleave • Output Driver Impedance Control • 8192 refresh cycles / 64ms - Average refresh period 7.8µs @ -40 °C ≦TC≦ +85°C 3.9µs @ +85 °C ＜TC≦ +105°C • Write Leveling • ZQ Calibration • Dynamic ODT (Rtt_Nom & Rtt_WR) • RoHS compliant • Auto Refresh and Self Refresh • 78-ball 9 x 10.5 x 1.2mm FBGA package - Pb and Halogen Free Overview The 4Gb Double-Data-Rate-3 DRAMs is double data rate architecture to achieve high-speed operation. It is internally configured as an eight bank DRAM. The 4Gb chip is organized as 64Mbit x 8 I/Os x 8 bank devices. These synchronous devices achieve high speed double-data-rate transfer rates of up to 1600 Mb/sec/pin for general applications. The chip is designed to comply with all key DDR3 DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with differential DQS pair in a source synchronous fashion. These devices operate with a single 1.5V ± 0.075V power supply and are available in BGA packages. Confidential - 2/83 - Rev.1.0 June 2015 4Gb Auto-AS4C512M8D3 Table 1. Speed Grade Information Speed Grade Clock Frequency CAS Latency tRCD (ns) tRP (ns) DDR3-1600 800 MHz 5 13.75 13.75 Table 2. Ordering Information Product part No Org Temperature Max Clock (MHz) AS4C 512M8D3-12BAN 512x 8 Automotive -40°C to 105°C 800 Package 78-ball FBGA |
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