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TPS54622 Datasheet(PDF) 20 Page - Texas Instruments

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Part No. TPS54622
Description  4.5-V to 17-V Input, 6-A Synchronous Step-Down SWIFT Converter With Hiccup Protection
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS54622 Datasheet(HTML) 20 Page - Texas Instruments

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RT/CLK
RRT
RT/CLK Mode Select
Copyright © 2016, Texas Instruments Incorporated
Fsw − Oscillator Frequency − kHz
0
50
100
150
200
250
200
400
600
800
1000
1200
1400
1600
(
)
0.997
2
-
W
×
-
Rrt(k
) = 48000 Fsw kHz
20
TPS54622
SLVSA70E – MARCH 2011 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: TPS54622
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Copyright © 2011–2016, Texas Instruments Incorporated
7.4 Device Functional Modes
7.4.1 Adjustable Switching Frequency (RT Mode)
To determine the RT resistance for a given switching frequency, use Equation 13 or the curve in Figure 24. To
reduce the solution size one would set the switching frequency as high as possible, but tradeoffs of the supply
efficiency and minimum controllable on-time should be considered.
(13)
Figure 24. RT Set Resistor vs Switching Frequency
7.4.2 Synchronization (CLK Mode)
An internal Phase Locked Loop (PLL) has been implemented to allow synchronization from 200 kHz to 1600 kHz,
and to easily switch from RT mode to CLK mode.
To implement the synchronization feature, connect a square wave clock signal to the RT/CLK pin with a duty
cycle from 20% to 80%. The clock signal amplitude must transition lower than 0.8 V and higher than 2 V. The
start of the switching cycle is synchronized to the falling edge of RT/CLK pin.
In applications where both RT mode and CLK mode are needed, the device can be configured as shown in
Figure 25. Before the external clock is present, the device works in RT mode and the switching frequency is set
by RT resistor. When the external clock is present, the CLK mode overrides the RT mode. The first time the
SYNC pin is pulled above the RT/CLK high threshold (2 V), the device switches from the RT mode to the CLK
mode and the RT/CLK pin becomes high impedance as the PLL starts to lock onto the frequency of the external
clock. TI does not recommended switching from the CLK mode back to the RT mode because the internal
switching frequency drops to 100 kHz first before returning to the switching frequency set by RT resistor.
Figure 25. Works With Both RT Mode and CLK Mode


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