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TPS51518 Datasheet(PDF) 19 Page - Texas Instruments

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Part # TPS51518
Description  Single-Phase, D-CAP and D-CAP2 Controller with 2-Bit Flexible VID Control
Download  35 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS51518 Datasheet(HTML) 19 Page - Texas Instruments

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Controller
TPS51518
DL
14
VIN
MODE
GND
V5
15
VOUT
VSNS
SLEW
20
2
6
VREF
UDG-11261
V1
1
GSNS
16
19
2.2 µF
#1
#2
#3
17
PwrPad
18
TRIP
VSNS
GSNS
0.1 µF
10 nF
3
4
5
V0
V3
V2
TPS51518
www.ti.com
SLUSAO8
– DECEMBER 2011
Thermal Shutdown
TPS51518 includes an internal temperature monitor. If the temperature exceeds the threshold value, 140
°C (typ),
VOUT is shut off. The state of VOUT is open at thermal shutdown. This is a non-latch protection and the operation
is restarted with soft-start sequence when the device temperature is reduced by 10
°C (typ).
Layout Considerations
Certain issues must be considered before designing a layout using the TPS51518.
Figure 26. DC/DC Converter Ground System
VIN capacitor(s), VOUT capacitor(s) and MOSFETs are the power components and should be placed on one
side of the PCB (solder side). Other small signal components should be placed on another side (component
side). At least one inner plane should be inserted, connected to ground, in order to shield and isolate the
small signal traces from noisy power lines.
All sensitive analog traces and components such as VSNS, SLEW, MODE, V0, V1, V2, V3, VREF and TRIP
should be placed away from high-voltage switching nodes such as SW, DH, DL or BST to avoid coupling.
Use internal layer(s) as ground plane(s) and shield feedback trace from power traces and components.
The DC/DC converter has several high-current loops. The area of these loops should be minimized in order to
suppress generating switching noise.
– Loop #1. The most important loop to minimize the area of is the path from the VIN capacitor(s) through the
high and low-side MOSFETs, and back to the capacitor(s) through ground. Connect the negative node of
the VIN capacitor(s) and the source of the low-side MOSFET at ground as close as possible. (Refer to loop
#1 of Figure 26)
– Loop #2. The second important loop is the path from the low-side MOSFET through inductor and VOUT
capacitor(s), and back to source of the low-side MOSFET through ground. Connect source of the low-side
MOSFET and negative node of VOUT capacitor(s) at ground as close as possible. (Refer to loop #2 of
Figure 26)
– Loop #3. The third important loop is of gate driving system for the low-side MOSFET. To turn on the
low-side MOSFET, high current flows from V5 capacitor through gate driver and the low-side MOSFET,
and back to negative node of the capacitor through ground. To turn off the low-side MOSFET, high current
Copyright
© 2011, Texas Instruments Incorporated
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