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ZGP323H Datasheet(PDF) 48 Page - Zilog, Inc. |
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ZGP323H Datasheet(HTML) 48 Page - Zilog, Inc. |
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48 / 107 page 
ZGP323H Product Specification PS023803-0305 Functional Description 40 Counter/Timer Functional Blocks Input Circuit The edge detector monitors the input signal on P31 or P20. Based on CTR1 D5– D4, a pulse is generated at the Pos Edge or Neg Edge line when an edge is detected. Glitches in the input signal that have a width less than specified (CTR1 D3, D2) are filtered out (see Figure 18). Figure 18. Glitch Filter Circuitry T8 Transmit Mode Before T8 is enabled, the output of T8 depends on CTR1, D1. If it is 0, T8_OUT is 1; if it is 1, T8_OUT is 0. See Figure 19. Reserved ---43210 R W 1 x Always reads 11111 No Effect *Indicates the value upon Power-On Reset. **Indicates the value upon Power-On Reset. Not reset with a Stop Mode recovery. Table 18. CTR3 (D)03H: T8/T16 Control Register (Continued) Field Bit Position Value Description MUX Glitch Filter Edge Detector P31 P20 Pos Edge Neg Edge CTR1 D5,D4 CTR1 D6 CTR1 D3, D2 |
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