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ZGP323H Datasheet(PDF) 10 Page - Zilog, Inc.

Part No. ZGP323H
Description  Programmable input glitch filter for pulse reception
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Maker  ZILOG [Zilog, Inc.]
Homepage  http://www.zilog.com
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ZGP323H Datasheet(HTML) 10 Page - Zilog, Inc.

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ZGP323H
Product Specification
PS023803-0305
General Description
2
Port 1: 0–3 pull-up transistors
Port 1: 4–7 pull-up transistors
Port 2: 0–7 pull-up transistors
EPROM Protection
WDT enabled at POR
General Description
The ZGP323H is an OTP-based member of the MCU family of infrared microcon-
trollers. With 237B of general-purpose RAM and up to 32KB of OTP, ZiLOG®’s
CMOS microcontrollers offer fast-executing, efficient use of memory, sophisti-
cated interrupts, input/output bit manipulation capabilities, automated pulse gen-
eration/reception, and internal key-scan pull-up transistors.
The ZGP323H architecture (Figure 1) is based on ZiLOG’s 8-bit microcontroller
core with an Expanded Register File allowing access to register-mapped peripher-
als, input/output (I/O) circuits, and powerful counter/timer circuitry. The Z8® offers
a flexible I/O scheme, an efficient register and address space structure, and a
number of ancillary features that are useful in many consumer, automotive, com-
puter peripheral, and battery-operated hand-held applications.
There are three basic address spaces available to support a wide range of config-
urations: Program Memory, Register File and Expanded Register File. The regis-
ter file is composed of 256 Bytes (B) of RAM. It includes 4 I/O port registers, 16
control and status registers, and 236 general-purpose registers. The Expanded
Register File consists of two additional register groups (F and D).
To unburden the program from coping with such real-time problems as generating
complex waveforms or receiving and demodulating complex waveform/pulses, the
Z8 GP OTP offers a new intelligent counter/timer architecture with 8-bit and
16-bit counter/timers (see Figure 2). Also included are a large number of user-
selectable modes and two on-board comparators to process analog signals with
separate reference voltages.
All signals with an overline, “ ”, are active Low. For example,
B/W, in which WORD is active Low, and B/W, in which BYTE is
active Low.
Power connections use the conventional descriptions listed in Table 3.
Note:


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