Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ZGP323H Datasheet(PDF) 73 Page - Zilog, Inc.

Part No. ZGP323H
Description  Programmable input glitch filter for pulse reception
Download  107 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  ZILOG [Zilog, Inc.]
Homepage  http://www.zilog.com
Logo 

ZGP323H Datasheet(HTML) 73 Page - Zilog, Inc.

Zoom Inzoom in Zoom Outzoom out
 73 / 107 page
background image
ZGP323H
Product Specification
PS023803-0305
Functional Description
65
Low-Voltage Detection Register—LVD(D)0Ch
Voltage detection does not work at Stop mode. It must be
disabled during Stop mode in order to reduce current.
Do not modify register P01M while checking a low-voltage
condition. Switching noise of both ports 0 and 1 together might
trigger the LVD flag.
Voltage Detection and Flags
The Voltage Detection register (LVD, register 0CH at the expanded register bank
0Dh
) offers an option of monitoring the VCC voltage. The Voltage Detection is
enabled when bit 0 of LVD register is set. Once Voltage Detection is enabled, the
the VCC level is monitored in real time. The flags in the LVD register valid 20uS
after Voltage Detection is enabled. The HVD flag (bit 2 of the LVD register) is set
only if VCC is higher than VHVD. The LVD flag (bit 1 of the LVD register) is set only
if VCC is lower than the VLVD. When Voltage Detection is enabled, the LVD flag
also triggers IRQ5. The IRQ bit 5 latches the low voltage condition until it is
cleared by instructions or reset. The IRQ5 interrupt is served if it is enabled in the
IMR register. Otherwise, bit 5 of IRQ register is latched as a flag only.
If it is necessary to receive an LVD interrupt upon power-up at
an operating voltage lower than the low battery detect
threshold, enable interrupts using the Enable Interrupt
instruction (EI) prior to enabling the voltage detection.
Field
Bit Position
Description
LVD
76543---
Reserved
No Effect
-----2--
R
1
0*
HVD flag set
HVD flag reset
------1-
R
1
0*
LVD flag set
LVD flag reset
-------0
R/W
1
0*
Enable VD
Disable VD
*Default after POR
Note:
Note:
Notes:


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn