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TPS5430, TPS5431

SLVS632I – JANUARY 2006 – REVISED APRIL 2017

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(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

Maximum power dissipation may be limited by overcurrent protection

(3)

distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or

below 125°C for best performance and long-term reliability. See Thermal Calculations in applications section of this data sheet for more

information.

(4)

Test boards conditions:

(a) 3 in x 3 in, 2 layers, thickness: 0.062 inch.

(b) 2 oz. copper traces located on the top and bottom of the PCB.

(c) 6 thermal vias in the PowerPAD area under the device package.

(5)

Test board conditions:

(a) 3 in x 3 in, 4 layers, thickness: 0.062 inch.

(b) 2 oz. copper traces located on the top and bottom of the PCB.

(c) 2 oz. copper ground planes on the 2 internal layers.

(d) 6 thermal vias in the PowerPAD area under the device package.

6.4 Thermal Information

TPS5430

TPS5431

UNIT

DDA

8 PINS

33

°C/W

26

Junction-to-ambient thermal resistance (standard board)

42.3

Junction-to-top characterization parameter

4.9

Junction-to-board characterization parameter

20.7

Junction-to-case(top) thermal resistance

46.4

Junction-to-case(bottom) thermal resistance

0.8

Junction-to-board thermal resistance

20.8