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9DBV0531 Datasheet(PDF) 1 Page - Integrated Device Technology

Part # 9DBV0531
Description  5-Output 1.8V HCSL Fanout Buffer
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

9DBV0531 Datasheet(HTML) 1 Page - Integrated Device Technology

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DATASHEET
9DBV0531 MARCH 10, 2017
1
©2016 Integrated Device Technology, Inc.
5-Output 1.8V HCSL Fanout Buffer
9DBV0531
Description
The 9DBV0531 is a member of IDT's Full-Featured PCIe
family. The device has 5 output enables for clock
management, and 3 selectable SMBus addresses.
Recommended Application
PCIe Gen1–3 clock distribution in Storage, Networking,
Computing, Consumer
Output Features
5 1–200MHz Low-Power (LP) HCSL DIF pairs
Easy AC-coupling to other logic families, see IDT
application note AN-891
Key Specifications
Additive cycle-to-cycle jitter < 5ps
Output-to-output skew < 50ps
Additive phase jitter is < 100fs rms for PCIe Gen3
Additive phase jitter < 300fs rms (12kHz–20MHz at
125MHz)
Features/Benefits
LP-HCSL outputs; save 10 resistors and 17mm2 compared
to standard HCSL
50mW typical power consumption; eliminates thermal
concerns
OE# pin for each output; support DIF power management
HCSL differential input; can be driven by common clock
sources
Spread spectrum tolerant; allows reduction of EMI
SMBus-selectable features allow optimization to customer
requirements
Slew rate for each output; allows tuning for various line
lengths
Differential output amplitude; allows tuning for various
application environments
1MHz to 200MHz operating frequency
3.3V tolerant SMBus interface works with legacy controllers
Selectable SMBus addresses; multiple devices can easily
share an SMBus segment
Device contains default configuration; SMBus interface not
required for device operation
Space saving 32-pin 5 x 5 mm VFQFPN; minimal board
space
Block Diagram
CONTROL
LOGIC
^CKPWRGD_PD#
SDATA_3.3
vOE(4:0)#
SCLK_3.3
vSADR
CLK_IN
5
DIF4
DIF3
DIF2
DIF1
DIF0
CLK_IN#


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