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56F8322 Datasheet(PDF) 9 Page - Motorola, Inc |
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56F8322 Datasheet(HTML) 9 Page - Motorola, Inc |
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9 / 128 page  Architecture Block Diagram 56F8322 Technical Data 9 Preliminary Figure 1-2 Peripheral Subsystem IPBus Timer A SPI 0 ADCA 2 6 SPI 1 GPIO A 4 Interrupt Controller To/From IPBus Bridge PWMA SCI 0 3 System POR Low-Voltage Interrupt COP Reset COP RESET Quadrature Decoder 0 4 GPIO B GPIO C FlexCAN SCI 1 4 TEMP_SENSE CLKGEN (OSC/PLL) (ROSC) POR & LVI SIM 2 ch2i ch2o Timer C The dotted line on Temperature Sense signifies the pad-to-pad bond between TEMP_SENSE and ANA7 on the 56F8322 2 2 SYNC Output Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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