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L6758A Datasheet(PDF) 7 Page - STMicroelectronics |
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L6758A Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 42 page DocID023298 Rev 2 7/42 L6758A Pin description and connection diagrams 42 7REF The reference used for the regulation of the multi-phase section is available on this pin with -100 mV offset. Connect through an R REF -C REF to RGND to optimize DVID transitions. Connect through an R OS resistor to FB pin to implement small positive offset to the regulation. 8GDC Gate drive control pin. Used for efficiency optimization, see Section 9 for details. If not used, it can be left floating. 9 VCC12 +12 V bus monitor to synchronize startup. The IC waits for the 12 V to become available before implementing soft- start when enabled. Connect directly to the +12 V bus (i.e. the high-side MOSFET drain). 10 SVCLK Serial clock. 11 ALERT# Alert. 12 SVDATA Serial data. 13 EN_VTT VTT level sensitive enable pin (3.3 V compatible). Pull low to disable the device, pull up above the turn-on threshold to enable the controller. 14 SPWM / SEN PWM output. Connect to external driver PWM input. During normal operation the device is able to manage HiZ status by setting and holding the pin to a fixed voltage defined by PWMx strapping. Connect to VCC5 with 1 k Ω to disable single-phase section. 15 VR_HOT Voltage regulator HOT. Open drain output; this is an alarm signal asserted by the controller when the temperature sensed through the TM and or ST pins exceed TMAX (active low). See Section 8 for details. 16 SCSP Single-phase section current sense positive input. Connect through an R-C filter to the phase-side of the channel 1 inductor. 17 SCSN Single-phase section current sense negative input. Connect through an Rg resistor to the output-side of the channel inductor. Filter the output-side of Rg with 100 nF (typ.) to GND. 18 SIMON Current monitor output. A current proportional to the single-phase current is sourced from this pin. Connect through a resistor R SIMON to local GND. When the pin voltage reaches 1.55 V, overcurrent protection is set and the IC latches. Filtering through C SIMON to GND allows to control the delay for OC intervention. 19 SRGND Remote ground sense. Connect to the negative side of the load to perform remote sense. 20 SVSEN Output voltage monitor, manages OV and UV protection. Connect to the positive side of the load to perform remote sense. 21 SFB Error amplifier inverting input. Connect with a resistor R SFB to SVSEN and with an (R SF - C SF )// C SP to SCOMP. Table 2. Pin description (continued) Pin# Name Function |
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