Electronic Components Datasheet Search |
|
TPA3111D1PWPR Datasheet(PDF) 4 Page - Texas Instruments |
|
|
TPA3111D1PWPR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 31 page 4 TPA3111D1 SLOS618F – AUGUST 2009 – REVISED JULY 2016 www.ti.com Product Folder Links: TPA3111D1 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. OUTP 18 O Class-D H-bridge positive output. OUTP 20 O Class-D H-bridge positive output. OUTN 23 O Class-D H-bridge negative output. OUTN 25 O Class-D H-bridge negative output. PGND 24 — Power ground for the H-bridges. PGND 19 — Power ground for the H-bridges. PLIMIT 10 I Power limit level adjust. Connect directly to GVDD pin for no power limiting. Add a 1-µF capacitor to ground at this pin. PVCC 15 P Power supply for H-bridge. PVCC pins are also connected internally. PVCC 16 P Power supply for H-bridge. PVCC pins are also connected internally. PVCC 27 P Power supply for H-bridge. PVCC pins are also connected internally. PVCC 28 P Power supply for H-bridge. PVCC pins are also connected internally. SD 1 I Shutdown logic input for audio amplifier (LOW = outputs Hi-Z, HIGH = outputs enabled). TTL logic levels with compliance to AVCC. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The voltage slew rate of these pins must be restricted to no more than 10 V/ms. For higher slew rates, use a 100-kΩ resistor in series with the pins. (3) The TPA3111D1 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection shutdown. See Quad Flatpack No-Lead Logic Packages and QFN/SON PCB Attachment for more information about using the QFN thermal pad. See PowerPad™ Thermally Enhanced package for more information about using the HTQFP thermal pad. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Supply voltage, VCC AVCC, PVCC –0.3 30 V Interface pin voltage, VI SD, FAULT, GAIN0, GAIN1, AVCC (Pin 14)(2) –0.3 VCC + 0.3 V <10 V/ms PLIMIT –0.3 VGVDD + 0.3 V INN, INP –0.3 6.3 Minimum load resistance, RL BTL 3.2 Ω Continuous total power dissipation See Thermal Information Operating free-air temperature, TA –40 85 °C Operating junction temperature, TJ (3) –40 150 °C Storage temperature, Tstg –65 150 °C (1) In accordance with JEDEC Standard 22, Test Method A114-B. (2) In accordance with JEDEC Standard 22, Test Method C101-A 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM)(1) ±2000 V Charged-device model (CDM)(2) ±500 |
Similar Part No. - TPA3111D1PWPR |
|
Similar Description - TPA3111D1PWPR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |