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TPA2028D1YZFT Datasheet(PDF) 6 Page - Texas Instruments |
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TPA2028D1YZFT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 43 page  TPA2028D1 SLOS660C – JANUARY 2010 – REVISED OCTOBER 2015 www.ti.com Electrical Characteristics (continued) at TA = 25°C, VDD = 3.6 V, SDZ = 1.3 V, and RL = 8 Ω + 33 μH (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output Impedance in shutdown 2 k Ω ZOUT EN = 0.35 V mode Gain accuracy Compression and limiter disabled, Gain = 0 to 30 dB –0.5 0.5 dB PSRR Power supply rejection ratio VDD = 2.5 V to 4.7 V –80 dB 7.6 Operating Characteristics at TA = 25°C, VDD = 3.6 V, EN = 1.3 V, RL = 8 Ω +33 μH, and AV = 6 dB (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT kSVR power-supply ripple rejection ratio VDD = 3.6 Vdc with ac of 200 mVPP at 217 Hz –70 dB faud_in = 1 kHz; PO = 550 mW; VDD = 3.6 V 0.1% faud_in = 1 kHz; PO = 1.25 W; VDD = 5 V 0.1% THD+N Total harmonic distortion + noise faud_in = 1 kHz; PO = 710 mW; VDD = 3.6 V 1% faud_in = 1 kHz; PO = 1.4 W; VDD = 5 V 1% NfonF Output integrated noise Av = 6 dB 42 μV NfoA Output integrated noise Av = 6 dB floor, A-weighted 30 μV FR Frequency response Av = 6 dB 20 20000 Hz THD+N = 10%, VDD = 5 V, RL = 8 Ω 1.72 W THD+N = 10%, VDD = 3.6 V, RL = 8 Ω 880 mW THD+N = 1%, VDD = 5 V, RL = 8 Ω 1.4 W Pomax Maximum output power THD+N = 1% , VDD = 3.6 V, RL = 8 Ω 710 mW THD+N = 1% , VDD = 5 V, RL = 4 Ω 2.5 W THD+N = 10% , VDD = 5 V, RL = 4 Ω 3 W THD+N = 1%, VDD = 3.6 V, RL = 8 Ω, PO= 0.71 W 91% η Efficiency THD+N = 1%, VDD = 5 V, RL = 8 Ω, PO = 1.4 W 93% 7.7 I 2C Timing Requirements For I 2C Interface Signals Over Recommended Operating Conditions (unless otherwise noted) MIN TYP MAX UNIT fSCL Frequency, SCL No wait states 400 kHz tW(H) Pulse duration, SCL high 0.6 μs tW(L) Pulse duration, SCL low 1.3 μs tSU(1) Setup time, SDA to SCL 100 ns th1 Hold time, SCL to SDA 10 ns t(buf) Bus free time between stop and start condition 1.3 μs tSU2 Setup time, SCL to start condition 0.6 μs th2 Hold time, start condition to SCL 0.6 μs tSU3 Setup time, SCL to stop condition 0.6 μs 6 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPA2028D1 |
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