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TAS5630B Datasheet(PDF) 21 Page - Texas Instruments

Part # TAS5630B
Description  300-W Stereo and 400-W Mono PurePath HD Analog-Input Power Stage
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5630B Datasheet(HTML) 21 Page - Texas Instruments

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0.005
0.01
0.1
1
10
20m
100m
1
10
100
400
PO − Output Power − W
4
6
8
TC = 75°C
G001
0
20
40
60
80
100
120
140
160
180
200
220
240
260
280
300
320
340
25
30
35
40
45
50
PVDD − Supply Voltage − V
4
6
8
TC = 75°C
THD+N at 10%
G001
TAS5630B
www.ti.com
SLES217D – NOVEMBER 2010 – REVISED MARCH 2015
Typical Application (continued)
Pin 13, 14 – Oscillator input/output. When frequency adjust pin is pulled up to VREG, the oscillator pins are
configured as inputs.
Pin 15 – Shutdown pin can be monitored by a microcontroller through GPIO pin. System can decide to assert
reset or power down. See Error Reporting.
Pin 16, 17 – There are two overtemperature warning pins for PHD package. They have two different levels of
warning. OTW1 is lower temperature level warning than OTW2. They can be monitored by a microcontroller
through GPIO pins. System can decide to turn on fan, lower output power or shutdown. See Error Reporting.
Pin 18 – Output clip indicator can be monitored by a microcontroller through a GPIO pin. System can decide
to lower the volume.
Pin 19 – Ready pin can be used to signal the system that the device is up and running.
Pin 20-22 – Mode pins set the input and output configurations. See Table 2 for configuration setting of these
pins.
Pin 25, 26, 55, 56 – Gate drive power pins provide gate voltage for half-bridges. Each needs a 3.3-
Ω isolation
resistor and a 0.1-uF decoupling capacitor.
Pins 27, 40, 41, 54 – Bootstrap pins for half-bridges A, B, C, D. Connect 33 nF from this pin to corresponding
output pins.
Pins 28, 29, 36, 37, 44, 45, 53, 54 – Output pins from half-bridges A, B, C, D. Connect appropriate bootstrap
capacitors to the output pins. For PWM filtering, each output mode is used with different LC configuration.
Pins 30, 31, 38, 39, 42, 43, 50, 51 – Power supply pins to half-bridges A, B, C, D. Each PVDD_X has
decoupling capacitor connecting to the appropriate GND_X pin.
Pins 32, 33, 34, 35, 46, 47, 48, 49 – Connect decoupling capacitors of each power input pin to power supply
ground pins. Connect these pins to board ground.
Pins 59-62 – Connect “No connect” pins to board ground. There is no internal connection to these pins.
8.2.1.3 Application Curves
Figure 16. Total Harmonic + Noise vs Output Power
Figure 17. Output Power vs Supply Voltage
Copyright © 2010–2015, Texas Instruments Incorporated
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