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TLV320AIC3262 Datasheet(PDF) 43 Page - Texas Instruments |
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TLV320AIC3262 Datasheet(HTML) 43 Page - Texas Instruments |
43 / 84 page Rload Rpop Cc Output Driver PAD -6...+14dB 1dB steps -6...+14dB 1dB steps HPL HPR Charge Pump (disabled) HPVSS_Sense VNEG CPFCP CPFCM HVDD_18 CPVSS DVDD_18 1.5...3. 6V DVDD DVdd TLV320AIC3262 www.ti.com SLAS679A – DECEMBER 2011 – REVISED SEPTEMBER 2015 10.3.4.11 Stereo Unipolar Configuration 10.3.4.11.1 Circuit Topology The power supply hook up scheme for the unipolar configuration is shown in Figure 23. HVDD_18 terminal supplies the positive side of the headphone amplifier. The negative side is connected to ground potential (VNEG). It is recommended to connect the CPVDD_18 terminal to DVdd, although the charge pump must not be enabled while the device is connected in unipolar configuration. Figure 23. Unipolar Stereo Headphone Circuit The left and right DAC channels are routed to the corresponding left and right headphone amplifier. This configuration is also used to drive line-level loads. To enable cap-coupled mode, B0_P1_R31_D7 should be set to 0. Note that the recommended range for the HVDD_18 supply in cap-coupled mode (1.65V-3.6V) is different than the recommended range for the default ground-centered configuration (1.5V-1.95V). In cap-coupled mode only, the Headphone output common mode can be controlled by changing B0_P1_R8_D[4:3]. 10.3.4.11.2 Unipolar Turn-On Transient (Pop) Reduction The TLV320AIC3262 headphone drivers also support pop-free operation in unipolar, ac-coupled configuration. Because the HPL and HPR are high-power drivers, pop can result due to sudden transient changes in the output drivers if care is not taken. The most critical care is required while using the drivers as stereo single-ended capacitively-coupled drivers as shown in Figure 23. The output drivers achieve pop-free power-up by using slow power-up modes. Conceptually, the circuit during power-up can be visualized as Figure 24. Conceptual Circuit for Pop-Free Power-up The value of Rpop can be chosen by setting register B0_P1_R11_D[1:0]. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 43 Product Folder Links: TLV320AIC3262 |
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