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PCM16C00 Datasheet(PDF) 20 Page - National Semiconductor (TI) |
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PCM16C00 Datasheet(HTML) 20 Page - National Semiconductor (TI) |
20 / 40 page 60 Operational Modes (Continued) 64 FUNCTIONAL CONCURRENCY A Dual Function Card may be designed using the PCM16C00 IC that allows both functions to run concurrent- ly The PCM16C00 bus arbitration unit interrupt unit and common memory unit allow functions to take control of the local data bus on the card at their discretion The bus arbiter will arbitrate between the PCMCIA Host Function 0 and Function 1 Once granted the bus each function may gain access to the common memory address space One tech- nique is to tie each function’s Memory Write signal to the PCM16C00 MEMWR input Each function should TRI-STATE its Memory Write if not granted the bus The PCM16C00 then generates MEMWEH and MEMWEL for memory access Also each function may tie its Memory Read to the Common Memory devices (tied to PCM16C00 MEMOE ) Again each device should TRI-STATE its Mem- ory Read signal when it is not granted the bus The PCM16C00 will TRI-STATE its MEMOE when the PCMCIA Host has not been granted the bus Note that both MEMWR and MEMOE have pull-up resistors on the PCM16C00 to prevent glitching As mentioned before once the PCMCIA Host has been granted access to the card bus the steering of transactions to function 0 or function 1 is implicit in the Address and the IO Window decoder settings for the PCM16C00 If Func- tion 0 or 1 has been granted the Card local bus and a PCMCIA host attempts an IO transaction (ie - Host is de- nied bus) the PCM16C00 will assert the HWAIT signal to extend the cycle de-assert the INPACK signal and set the RdyBsy bit in the Pin Replacement Registers 65 16-BIT8-BIT OPERATION During normal operation the PCM16C00 will function as a 16-bit device If a LAN IC is used the LAN should always be configured as a 16-bit device If 8-bit operation is desired (PCMCIA Host accesses are 8-bit) the PCM16C00 will pass the 8-bit transaction to the Function In the case of a 16-bit LAN device the PCM16C00 will pass the 8-bit transaction since the LAN IC register access is 8 bits With the common memory device the PCM16C00 will check the Memls8 bit in the Pin Polarity Register If Memls8 is clear (16-bit memory) the PCM16C00 will strobe MEMWEL for 8-bit accesses on even address boundaries and MEMWEH for 8-bit access- es on odd address boundaries A 16-bit access causes both MEMWEL and MEMWEL to be strobed A 16-bit LAN device will still execute 16-bit accesses to the Common memory even though PCMCIA is using 8-bit accesses Due to this a MEMWR will cause both MEMWEH and MEMWEL to be strobed This allows the LAN to use 16-bit local DMA with Common Memory If the LAN uses remote DMA and places 16 bits of data from the Common Memory into the PCM16C00 for subsequent transferral to PCMCIA it will implement bus steering on PCMCIA 8-bit transactions to this data and delay issuing RACK or WACK to the LAN device until both bytes of data are read from the IO Regis- ter If Memls8 is set (8-bit memory) the PCM16C00 will strobe MEMWEL for 8-bit PCMCIA accesses on odd or even address boundaries For 16-bit access the PCM16C00 will only obtain one byte of data by strobing MEMWEL 66 SPECIAL TESTABILITY MODES National Proprietary TEST(20) pins should be left discon- nected Software System or device software can interact with the PCM16C00 IC directly using either the PCM16C00’s PCMCIA registers PCMCIA Extended registers or PCM16C00 specific regis- ters CIS (CARD INFORMATION STRUCTURE) When the PCM16C00 powers on the contents of the EEPROM are loaded into the device’s shadow RAM This not only allows attribute memory accesses to the CIS but it also provides defaults for 10 PCM16C00 specific registers to be loaded This allows default loading of parameters that are transparent to system or device software The best use is for the card manufacturer to determine what values these should be and program them into the EEPROM when the CIS is programmed Either system software such as Card ServicesSocket Services or device software may read and parse the CIS by accessing attribute memory on the PC Card If desired this software agent may write to the CIS or default EEPROM registers and if desired have these new values saved to the EEPROM The actual contents of the CIS and the static registers is PC Card design dependent PCMCIA REGISTERS There are two sets of standard PCMCIA Registers which includes the optional IO Event Register This allows each function’s client software to be able to configure control and get status for its respective function For a detailed de- scription see the register specifications in this document PCMCIA EXTENDED REGISTERS Each function has a set of base and limit registers The value placed in these registers by system software controls the IO Addressing window for each function PCM16C00 SPECIFIC REGISTERS There are three categories of PCM16C00 specific registers The first set of registers are those specific registers that are automatically loaded from the EEPROM and should be transparent to system software Even though software could be written to modify these registers the most likely scenario would be the case where software performed mac- ro time scale power management using the PMGR and Clock Register for software power management The sec- ond set are those registers not stored in the EEPROM (such as the ID Register and EEPROM Control Register) These may be accessed by system software as desired using the attribute memory space The third set are only accessible when in LAN Mode This includes the Data IO Miscellane- ous and Reset Register for use with the LAN Adapter These registers are mapped to the IO Memory space with- in the IO address window for function 0 These registers should be accessed by a LAN client device driver for the appropriate LAN device and Network Operating System 20 |
Similar Part No. - PCM16C00 |
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Similar Description - PCM16C00 |
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