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PCM16C00 Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. PCM16C00
Description  Configurable Multiple Function PCMCIA Interface Chip
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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PCM16C00 Datasheet(HTML) 6 Page - National Semiconductor (TI)

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30 Pinout Description (Continued)
TABLE 3-3 Card-Side Interface Pins
(Continued)
Pin
Pin
Pin
Level
Internal
Description
Name
Type
No
Compatibility
Resistor
IOCS16(10)
I
135 59
TTL
This pin is asserted during an access to a function if that
function is capable of a 16-bit access
BREQ(10)
I
131 55
TTL
Bus requests for local and remote DMA
BACK(10)
O
130 54
CMOS 6 mA
Bus grants for local and remote DMA
LA(150)
O Tri
51 – 48
CMOS 6 mA
Hold Circuit
Local Address Bus This may be equivalent to the
46 – 37
HADDR(150) bus for PCMCIA Host readswrites or a
(Note 1)
35 34
latched address from a DMA controller such as a LAN
controller
ADS
I
52
TTL
Address Strobe to latch LDATA(150) onto LA(150)
PCNTL(10)
O
15 14
CMOS 6 mA
Power management control signals or general outputs
MCLK(10)
I
134 56
TTL Schmitt
Input clocks for function 0 and function 1
FCLK(10)
O
132 57
CMOS 6 mA
Output clock signals for function 0 and function 1
These may be gated onoff or be a divided value of
MCLK(10)
MEMWR
I
30
TTL
l
100k to VCC
Common Memory write input for one function
MEMWEH
O Tri
31
CMOS 6 mA
l
10k to VCC
Common Memory write output for upper byte of data
word
MEMWEL
O Tri
32
CMOS 6 mA
l
10k to VCC
Common Memory write output for lower byte of data
word
MEMOE
O Tri
33
CMOS 6 mA
l
10k to VCC
Common Memory read signal
PRQ
I
29
TTL
l
100k to GND
Port Request from LAN Device for Remote DMA
Access mode to IO Register
PRD
I
24
TTL
l
100k to VCC
Port Read from LAN Device to IO Register
RACK
O
25
CMOS 6 mA
Read Acknowledge from the PCM16C00 signaling to
the LAN that the PCMCIA Host has read the entire IO
Register
PWR
I
27
TTL
l
100k to VCC
Port Write from LAN Device to IO Register
WACK
O
28
CMOS 6 mA
Write Acknowledge from the PCM16C00 signaling to
the LAN that the PCMCIA Host has placed data in the
entire IO Register
Note 1
The Hold Circuit will hold the signal to the logic value it was last set to when the line is TRI-STATE
This will insure that inputs do not float during a
TRI-STATE condition
TABLE 3-4 Miscellaneous Pins
Pin
Pin
Pin
Level
Internal
Description
Name
Type
No
Compatibility
Resistor
TEST(20)
I
126 125
TTL
l
100k to GND
Test pins These pins should be left disconnected for
124
normal operation
VCC(50)
Power
16 36
Power Voltage
58 86
108 123
GND(70)
Power
6 26 47
Return Voltage
69 77
97 113
133
6


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