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TLC5946PWP Datasheet(PDF) 5 Page - Texas Instruments |
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TLC5946PWP Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 41 page  SWITCHING CHARACTERISTICS TLC5946 www.ti.com .......................................................................................................................................................... SLVS824B – MARCH 2008 – REVISED JUNE 2008 At VCC = 3.0 V to 5.5 V, TA = –40°C to +85°C, CL0 = 15 pF, RL0 = 100 Ω, CL1 = 100 pF, RL1 = 1 kΩ, RIREF = 1.3 kΩ, VLED = 5 V, and VXERR = 5 V. Typical values at VCC = 3.3 V and TA = +25°C, unless otherwise noted. TLC5946 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tR0 SOUT (see Figure 11) 16 Rise time ns tR1 OUTn, VCC = 5 V, DC = 3Fh (see Figure 11) 10 30 tF0 SOUT (see Figure 11) 16 ns tF1 Fall time OUTn, VCC = 5 V, DC = 3Fh (see Figure 11) 10 30 tF2 XERR (see Figure 11) 100 ns tD0 SCLK to SOUT (see Figure 12)(1) 25 ns tD1 BLANK ↑ to OUT0 sink current off (see Figure 12) 20 40 ns tD2 GSCLK ↑ to OUT0/4/8/12 (see Figure 12) 5 18 40 ns tD3 GSCLK ↑ to OUT1/5/9/13 (see Figure 12) 20 42 73 ns Propagation delay time tD4 GSCLK ↑ to OUT2/6/10/14 (see Figure 12) 35 66 106 ns tD5 GSCLK ↑ to OUT3/7/11/15 (see Figure 12) 50 90 140 ns XLAT ↑ to OUTn (dot correction) tD6 100 ns 00h to 3Fh, 3Fh to 00h (see Figure 12) tOUTON – tGSCLK, GSn = 001h, GSCLK = 33 MHz tON_ERR Output on-time error –20 10 ns (see Figure 13) (1) XHALF = H: rising edge of SCLK to SOUT; XHALF = L: falling edge of SCLK to SOUT. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TLC5946 |
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