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TLC5946PW Datasheet(PDF) 8 Page - Texas Instruments |
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TLC5946PW Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 41 page  TLC5946 SLVS824B – MARCH 2008 – REVISED JUNE 2008 .......................................................................................................................................................... www.ti.com TERMINAL FUNCTIONS TERMINAL NAME PW/PWP RHB I/O DESCRIPTION Blank (all constant current outputs off). When BLANK is high, all constant current outputs (OUT0 through OUT15) are forced off, the Grayscale PWM timing controller initializes and the Grayscale BLANK 2 31 I counter resets to '0'. When BLANK is low, all constant current outputs are controlled by the Grayscale PWM timing controller. GND 1 30 — Ground GSCLK 25 24 I Reference clock for Grayscale PWM control. This pin sets the constant current value. OUT0 through OUT15 sink constant current is set to IREF 27 26 I/O desired value by connecting an external resistor between IREF and GND. Input mode pin. When MODE is high, the input mode is dot correction (DC). When MODE is low, MODE 6 3 I the input mode is grayscale (GS). 12, 13, NC — — No connection 28, 29 OUT0 7 4 O Constant current output OUT1 8 5 O Constant current output OUT2 9 6 O Constant current output OUT3 10 7 O Constant current output OUT4 11 8 O Constant current output OUT5 12 9 O Constant current output OUT6 13 10 O Constant current output OUT7 14 11 O Constant current output OUT8 15 14 O Constant current output OUT9 16 15 O Constant current output OUT10 17 16 O Constant current output OUT11 18 17 O Constant current output OUT12 19 18 O Constant current output OUT13 20 19 O Constant current output OUT14 21 20 O Constant current output OUT15 22 21 O Constant current output SCLK 4 1 I Serial data shift clock SIN 5 2 I Serial data input SOUT 24 23 O Serial data output VCC 28 27 I Power-supply voltage XERR 23 22 O Error output. Open-drain output. XERR goes low when LOD or TEF is detected. Extended serial interface. When XHALF is high, the device operates normally. When XHALF is XHALF 26 25 I low, the extended serial interface is activated. Edge triggered latch signal. At the rising edge of XLAT, the TLC5946 writes data from the input XLAT 3 32 I shift register to either the Dot Correction register (MODE = high) or the Grayscale register (MODE = low). 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TLC5946 |
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