f_(SCLK) + 112

f_(update)

n

TLC5923

SIN

SOUT

OUT0

OUT15

SCLK

MODE

XLAT

BLANK

IREF

XERR

TLC5923

SIN

SOUT

OUT0

OUT15

SCLK

MODE

XLAT

BLANK

IREF

XERR

IC 0

IC n

5

SIN

SCLK

MODE

XLAT

BLANK

XERR

Controller

SOUT

100 k

100 nF

100 nF

TLC5923

SLVS550B – DECEMBER 2004 – REVISED JANUARY 2013

www.ti.com

Figure 9. Cascading Devices

Figure 9 shows a example application with n cascaded TLC5923 devices connected to a controller. The

maximum number of cascaded TLC5923 devices depends on application system and data transfer rate.

Equation 3 calculates the minimum data input frequency needed.

(3)

where:

f_(SCLK): The minimum data input frequency for SCLK and SIN.

f_(update): The update rate of the whole cascaded system.

n: The number of cascaded TLC5923 devices.

Operating Modes

The TLC5923 has different operating modes depending on MODE signal. Table 2 shows the available operating

modes. The values in the input shift registers, DC register and On/Off register are unknown just after power on.

The DC and On/Off register values should be properly stored through the serial interface before starting the

operation.

Table 2. TLC5923 Operating Modes Truth Table

MODE SIGNAL

INPUT SHIFT REGISTER

MODE

LOW

16 bit

On/Off Mode

HIGH

112 bit

Dot Correction Data Input Mode

10

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