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SN75LVDS83B Datasheet(PDF) 3 Page - Texas Instruments

Part # SN75LVDS83B
Description  FlatLink Transmitter
Download  43 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN75LVDS83B Datasheet(HTML) 3 Page - Texas Instruments

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IOVCC
VCC
LVDSVCC
GND
CLKSEL
D16
D15
D14
GND
CLKOUTM
D13
D17
D5
D6
D7
D8
D10
D11
D18
GND
D21
D23
D24
D2
D3
D4
GND
D1
D0
D27
GND
Y0M
GND
GND
PLLVCC
GND
SHTDN
CLKIN
D26
GND
GND
D9
D12
D19
D20
D22
IOVCC
D25
Y0P
Y1M
Y1P
Y2M
Y2P
Y3M
Y3P
CLKOUTP
SN75LVDS83B
www.ti.com
SLLS846C – MAY 2009 – REVISED AUGUST 2014
5 Description (Continued)
The SN75LVDS83B requires no external components and little or no control. The data bus appears the same at
the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The
only user intervention is selecting a clock rising edge by inputting a high level to CLKSEL or a falling edge with a
low-level input, and the possible use of the Shutdown/Clear (SHTDN). SHTDN is an active-low input to inhibit the
clock, and shut off the LVDS output drivers for lower power consumption. A low-level on this signal clears all
internal registers to a low-level.
The SN75LVDS83B is characterized for operation over ambient air temperatures of –10°C to 70°C.
Alternative device option: The SN75LVDS83A (SLLS980) is an alternative to the SN75LVDS83B for clock
frequency range of 10MHz-100MHz only. The SN75LVDS83A is available in the TSSOP package option only.
6 Pin Configuration and Functions
56-PIN
DGG PACKAGE
(TOP VIEW)
DGG Pin List
PIN
SIGNAL
PIN
SIGNAL
PIN
SIGNAL
PIN
SIGNAL
1
IOVCC
15
D15
29
GND
43
GND
2
D5
16
D16
30
D26
44
LVDSVCC
3
D6
17
CLKSEL
31
CLKIN
45
Y1P
4
D7
18
D17
32
SHTDN
46
Y1M
5
GND
19
D18
33
GND
47
Y0P
Copyright © 2009–2014, Texas Instruments Incorporated
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