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PC87364 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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PC87364 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 180 page Table of Contents (Continued) 6 www.national.com 2.8 SUPERI/O CONFIGURATION REGISTERS ............................................................................. 41 2.8.1 SuperI/O ID Register (SID) .......................................................................................... 42 2.8.2 SuperI/O Configuration 1 Register (SIOCF1) .............................................................. 42 2.8.3 SuperI/O Configuration 2 Register (SIOCF2) .............................................................. 43 2.8.4 SuperI/O Configuration 3 Register (SIOCF3) .............................................................. 44 2.8.5 SuperI/O Configuration 4 Register (SIOCF4) .............................................................. 45 2.8.6 SuperI/O Configuration 5 Register (SIOCF5) .............................................................. 46 2.8.7 SuperI/O Revision ID Register (SRID) ........................................................................ 46 2.8.8 SuperI/O Configuration 8 Register (SIOCF8) .............................................................. 47 2.8.9 SuperI/O Configuration A Register (SIOCFA) ............................................................. 48 2.8.10 SuperI/O Configuration B Register (SIOCFB) ............................................................. 49 2.8.11 SuperI/O Configuration C Register (SIOCFC) ............................................................. 50 2.8.12 SuperI/O Configuration D Register (SIOCFD) ............................................................. 51 2.9 FLOPPY DISK CONTROLLER (FDC) CONFIGURATION ........................................................ 52 2.9.1 General Description ..................................................................................................... 52 2.9.2 Logical Device 0 (FDC) Configuration ......................................................................... 52 2.9.3 FDC Configuration Register ........................................................................................ 53 2.9.4 Drive ID Register ......................................................................................................... 54 2.10 PARALLEL PORT CONFIGURATION ...................................................................................... 55 2.10.1 General Description ..................................................................................................... 55 2.10.2 Logical Device 1 (PP) Configuration ............................................................................ 56 2.10.3 Parallel Port Configuration Register ............................................................................ 56 2.11 SERIAL PORT 2 CONFIGURATION ......................................................................................... 57 2.11.1 General Description ..................................................................................................... 57 2.11.2 Logical Device 2 (SP2) Configuration .......................................................................... 57 2.11.3 Serial Port 2 Configuration Register ............................................................................ 57 2.12 SERIAL PORT 1 CONFIGURATION ......................................................................................... 58 2.12.1 Logical Device 3 (SP1) Configuration .......................................................................... 58 2.12.2 Serial Port 1 Configuration Register ............................................................................ 58 2.13 SYSTEM WAKE-UP CONTROL (SWC) CONFIGURATION ..................................................... 59 2.13.1 Logical Device 4 (SWC) Configuration ........................................................................ 59 2.14 KEYBOARD AND MOUSE CONTROLLER (KBC) CONFIGURATION ..................................... 60 2.14.1 General Description ..................................................................................................... 60 2.14.2 Logical Devices 5 and 6 (Mouse and Keyboard) Configuration .................................. 61 2.14.3 KBC Configuration Register ........................................................................................ 62 2.15 GENERAL-PURPOSE INPUT/OUTPUT (GPIO) PORTS CONFIGURATION .......................... 63 2.15.1 General Description ..................................................................................................... 63 2.15.2 Implementation ............................................................................................................63 2.15.3 Logical Device 7 (GPIO) Configuration ....................................................................... 64 2.15.4 GPIO Pin Select Register ............................................................................................ 65 2.15.5 GPIO Pin Configuration Register ................................................................................. 66 2.15.6 GPIO Event Routing Register ...................................................................................... 67 2.16 ACCESS.BUS INTERFACE (ACB) CONFIGURATION ............................................................ 68 2.16.1 General Description ..................................................................................................... 68 2.16.2 Logical Device 8 (ACB) Configuration ......................................................................... 68 |
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