SN54ALS191, SN54ALS191

SYNCHRONOUS 4-BIT UP/DOWN DECADE COUNTERS

SDAS210 – D2661, DECEMBER 1982 – REVISED MAY 1986

POST OFFICE BOX 655303

5

typical load, count, and inhibit sequences

7

8

9

0

1

2

2

2

1

0

9

8

RCO

MAX/MIN

QD

QC

QB

QA

7

Count Down

Load

Inhibit

Count Up

Data

Inputs

CTEN

D/U

CLOCK

D

C

B

A

LOAD

’ALS191

Illustrated below is the following sequence:

1. Load (preset) to BCD seven

2. Count up to eight, nine (maximum), zero, one, and two

3. Inhibit

4. Count down to one, zero (minimum), nine, eight, and seven