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MSP430F135IRTDR Datasheet(PDF) 14 Page - Texas Instruments

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Part No. MSP430F135IRTDR
Description  MIXED SIGNAL MICROCONTROROLLER
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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MSP430F135IRTDR Datasheet(HTML) 14 Page - Texas Instruments

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MSP430x13x, MSP430x14x, MSP430x14x1
MIXED SIGNAL MICROCONTROLLER
SLAS272F − JULY 2000 − REVISED JUNE 2004
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
special function registers
Most interrupt and module-enable bits are collected in the lowest address space. Special-function register bits
not allocated to a functional purpose are not physically present in the device. This arrangement provides simple
software access.
interrupt enable 1 and 2
76
5
4
0
UTXIE0
OFIE
WDTIE
32
1
rw-0
rw-0
rw-0
Address
0h
URXIE0
ACCVIE
NMIIE
rw-0
rw-0
rw-0
WDTIE:
Watchdog-timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog
timer is configured in interval timer mode.
OFIE:
Oscillator-fault-interrupt enable
NMIIE:
Nonmaskable-interrupt enable
ACCVIE:
Flash access violation interrupt enable
URXIE0:
USART0: UART and SPI receive-interrupt enable
UTXIE0:
USART0: UART and SPI transmit-interrupt enable
76
5
4
0
UTXIE1
32
1
rw-0
rw-0
Address
01h
URXIE1
URXIE1:
USART1: UART and SPI receive-interrupt enable
UTXIE1:
USART1: UART and SPI transmit-interrupt enable
interrupt flag register 1 and 2
76
5
4
0
UTXIFG0
OFIFG
WDTIFG
32
1
rw-0
rw-1
rw-(0)
Address
02h
URXIFG0
NMIIFG
rw-1
rw-0
WDTIFG:
Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on VCC
power up or a reset condition at the RST/NMI pin in reset mode.
OFIFG:
Flag set on oscillator fault
NMIIFG:
Set via RST/NMI pin
URXIFG0:
USART0: UART and SPI receive flag
UTXIFG0:
USART0: UART and SPI transmit flag
76
5
4
0
UTXIFG1
32
1
rw-1
rw-0
Address
03h
URXIFG1
URXIFG1:
USART1: UART and SPI receive flag
UTXIFG1:
USART1: UART and SPI transmit flag


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